mirror of
https://git.rtems.org/rtems-libbsd/
synced 2025-05-15 04:06:44 +08:00
6514d56158
- Refactor the libio interface - Move syscalls into an rtemsbsd location - Provide a root directory mount point Update #4475
925 lines
21 KiB
C++
925 lines
21 KiB
C++
/**
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* @file
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*
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* @ingroup rtems_bsd_machine
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*
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* @brief TODO.
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*/
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/*
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* Copyright (c) 2020 Chris Johns All rights reserved.
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* Copyright (c) 2009, 2015 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _RTEMS_BSD_MACHINE_ATOMIC_H_
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#define _RTEMS_BSD_MACHINE_ATOMIC_H_
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#include <rtems.h>
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#ifdef RTEMS_SMP
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#if defined(__cplusplus) \
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&& (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9))
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/*
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* The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The
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* suggested solution was to include <atomic> in case C++ is used. This works
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* at least with GCC 4.9. See also:
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*
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* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932
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* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940
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*/
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#include <atomic>
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#define _RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC
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#else
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#include <stdatomic.h>
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#define _RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC
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#endif
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#endif
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static inline void
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mb(void)
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{
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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std::atomic_thread_fence(std::memory_order_seq_cst);
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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atomic_thread_fence(memory_order_seq_cst);
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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}
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static inline void
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wmb(void)
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{
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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std::atomic_thread_fence(std::memory_order_release);
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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atomic_thread_fence(memory_order_release);
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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}
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static inline void
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rmb(void)
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{
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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std::atomic_thread_fence(std::memory_order_acquire);
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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atomic_thread_fence(memory_order_acquire);
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#else
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RTEMS_COMPILER_MEMORY_BARRIER();
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#endif
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}
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/*
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* Load
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_LOAD(T, p, mo, barrier) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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tmp = q->load(std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_LOAD(T, p, mo, barrier) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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tmp = atomic_load_explicit(q, mo)
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#else
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#define _ATOMIC_LOAD(T, p, mo, barrier) \
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if (barrier) \
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RTEMS_COMPILER_MEMORY_BARRIER(); \
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tmp = *p
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#endif
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static inline int
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atomic_load_int(volatile int *p)
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{
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int tmp;
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_ATOMIC_LOAD(int, p, memory_order_relaxed, false);
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return (tmp);
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}
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static inline int
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atomic_load_acq_int(volatile int *p)
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{
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int tmp;
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_ATOMIC_LOAD(int, p, memory_order_acquire, true);
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return (tmp);
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}
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static inline uint32_t
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atomic_load_32(volatile uint32_t *p)
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{
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uint32_t tmp;
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_ATOMIC_LOAD(uint_fast32_t, p, memory_order_relaxed, false);
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return (tmp);
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}
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static inline uint32_t
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atomic_load_acq_32(volatile uint32_t *p)
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{
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uint32_t tmp;
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_ATOMIC_LOAD(uint_fast32_t, p, memory_order_acquire, true);
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return (tmp);
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}
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static inline long
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atomic_load_long(volatile long *p)
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{
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long tmp;
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_ATOMIC_LOAD(long, p, memory_order_relaxed, false);
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return (tmp);
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}
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static inline long
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atomic_load_acq_long(volatile long *p)
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{
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long tmp;
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_ATOMIC_LOAD(long, p, memory_order_acquire, true);
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return (tmp);
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}
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/*
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* Store
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_STORE(T, p, v, mo, barrier) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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q->store(std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_STORE(T, p, v, mo, barrier) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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atomic_store_explicit(q, v, mo)
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#else
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#define _ATOMIC_STORE(T, p, v, mo, barrier) \
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*p = v; \
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if (barrier) \
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RTEMS_COMPILER_MEMORY_BARRIER()
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#endif
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static inline void
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atomic_store_int(volatile int *p, int v)
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{
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_ATOMIC_STORE(int, p, v, memory_order_relaxed, false);
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}
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static inline void
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atomic_store_rel_int(volatile int *p, int v)
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{
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_ATOMIC_STORE(int, p, v, memory_order_release, true);
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}
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static inline void
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atomic_store_rel_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_STORE(uint_fast32_t, p, v, memory_order_release, true);
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}
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static inline void
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atomic_store_rel_long(volatile long *p, long v)
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{
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_ATOMIC_STORE(long, p, v, memory_order_release, true);
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}
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static inline void
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atomic_store_rel_ptr(volatile uintptr_t *p, uintptr_t v)
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{
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/* XXX IPL32 ok with this? */
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_ATOMIC_STORE(uintptr_t, p, v, memory_order_release, true);
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}
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/*
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* Add
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_ADD(T, p, v, mo) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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q->fetch_add(v, std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_ADD(T, p, v, mo) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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atomic_fetch_add_explicit(q, v, mo)
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#else
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#define _ATOMIC_ADD(T, p, v, mo) \
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rtems_interrupt_level level; \
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rtems_interrupt_disable(level); \
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*p += v; \
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rtems_interrupt_enable(level)
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#endif
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static inline void
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atomic_add_int(volatile int *p, int v)
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{
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_ATOMIC_ADD(int, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_add_acq_int(volatile int *p, int v)
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{
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_ATOMIC_ADD(int, p, v, memory_order_acquire);
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}
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static inline void
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atomic_add_rel_int(volatile int *p, int v)
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{
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_ATOMIC_ADD(int, p, v, memory_order_release);
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}
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static inline void
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atomic_add_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_ADD(uint_fast32_t, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_add_acq_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_ADD(uint_fast32_t, p, v, memory_order_acquire);
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}
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static inline void
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atomic_add_rel_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_ADD(uint_fast32_t, p, v, memory_order_release);
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}
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static inline void
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atomic_add_long(volatile long *p, long v)
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{
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_ATOMIC_ADD(long, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_add_acq_long(volatile long *p, long v)
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{
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_ATOMIC_ADD(long, p, v, memory_order_acquire);
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}
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static inline void
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atomic_add_rel_long(volatile long *p, long v)
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{
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_ATOMIC_ADD(long, p, v, memory_order_release);
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}
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/*
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* Subtract
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_SUB(T, p, v, mo) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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q->fetch_sub(v, std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_SUB(T, p, v, mo) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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atomic_fetch_sub_explicit(q, v, mo)
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#else
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#define _ATOMIC_SUB(T, p, v, mo) \
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rtems_interrupt_level level; \
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rtems_interrupt_disable(level); \
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*p -= v; \
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rtems_interrupt_enable(level)
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#endif
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static inline void
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atomic_subtract_int(volatile int *p, int v)
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{
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_ATOMIC_SUB(int, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_subtract_acq_int(volatile int *p, int v)
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{
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_ATOMIC_SUB(int, p, v, memory_order_acquire);
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}
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static inline void
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atomic_subtract_rel_int(volatile int *p, int v)
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{
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_ATOMIC_SUB(int, p, v, memory_order_release);
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}
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static inline void
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atomic_subtract_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SUB(uint_fast32_t, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_subtract_acq_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SUB(uint_fast32_t, p, v, memory_order_acquire);
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}
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static inline void
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atomic_subtract_rel_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SUB(uint_fast32_t, p, v, memory_order_release);
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}
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static inline void
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atomic_subtract_long(volatile long *p, long v)
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{
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_ATOMIC_SUB(long, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_subtract_acq_long(volatile long *p, long v)
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{
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_ATOMIC_SUB(long, p, v, memory_order_acquire);
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}
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static inline void
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atomic_subtract_rel_long(volatile long *p, long v)
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{
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_ATOMIC_SUB(long, p, v, memory_order_release);
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}
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/*
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* Set
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_SET(T, p, v, mo) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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q->fetch_or(v, std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_SET(T, p, v, mo) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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atomic_fetch_or_explicit(q, v, mo)
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#else
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#define _ATOMIC_SET(T, p, v, mo) \
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rtems_interrupt_level level; \
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rtems_interrupt_disable(level); \
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*p |= v; \
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rtems_interrupt_enable(level)
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#endif
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static inline void
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atomic_set_int(volatile int *p, int v)
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{
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_ATOMIC_SET(int, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_set_acq_int(volatile int *p, int v)
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{
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_ATOMIC_SET(int, p, v, memory_order_acquire);
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}
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static inline void
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atomic_set_rel_int(volatile int *p, int v)
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{
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_ATOMIC_SET(int, p, v, memory_order_release);
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}
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static inline void
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atomic_set_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SET(uint_fast32_t, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_set_acq_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SET(uint_fast32_t, p, v, memory_order_acquire);
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}
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static inline void
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atomic_set_rel_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_SET(uint_fast32_t, p, v, memory_order_release);
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}
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static inline void
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atomic_set_long(volatile long *p, long v)
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{
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_ATOMIC_SET(long, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_set_acq_long(volatile long *p, long v)
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{
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_ATOMIC_SET(long, p, v, memory_order_acquire);
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}
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static inline void
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atomic_set_rel_long(volatile long *p, long v)
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{
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_ATOMIC_SET(long, p, v, memory_order_release);
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}
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/*
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* Clear
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*/
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#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
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#define _ATOMIC_CLEAR(T, p, v, mo) \
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std::atomic_##T *q = \
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reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
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q->fetch_and(~v, std::mo)
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#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
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#define _ATOMIC_CLEAR(T, p, v, mo) \
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atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
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atomic_fetch_and_explicit(q, ~v, mo)
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#else
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#define _ATOMIC_CLEAR(T, p, v, mo) \
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rtems_interrupt_level level; \
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rtems_interrupt_disable(level); \
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*p &= ~v; \
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rtems_interrupt_enable(level)
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#endif
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static inline void
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atomic_clear_int(volatile int *p, int v)
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{
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_ATOMIC_CLEAR(int, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_clear_acq_int(volatile int *p, int v)
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{
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_ATOMIC_CLEAR(int, p, v, memory_order_acquire);
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}
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static inline void
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atomic_clear_rel_int(volatile int *p, int v)
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{
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_ATOMIC_CLEAR(int, p, v, memory_order_release);
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}
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static inline void
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atomic_clear_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_CLEAR(uint_fast32_t, p, v, memory_order_seq_cst);
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}
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static inline void
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atomic_clear_acq_32(volatile uint32_t *p, uint32_t v)
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{
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_ATOMIC_CLEAR(uint_fast32_t, p, v, memory_order_acquire);
|
|
}
|
|
|
|
static inline void
|
|
atomic_clear_rel_32(volatile uint32_t *p, uint32_t v)
|
|
{
|
|
_ATOMIC_CLEAR(uint_fast32_t, p, v, memory_order_release);
|
|
}
|
|
|
|
static inline void
|
|
atomic_clear_long(volatile long *p, long v)
|
|
{
|
|
_ATOMIC_CLEAR(long, p, v, memory_order_release);
|
|
}
|
|
|
|
static inline void
|
|
atomic_clear_acq_long(volatile long *p, long v)
|
|
{
|
|
_ATOMIC_CLEAR(long, p, v, memory_order_acquire);
|
|
}
|
|
|
|
static inline void
|
|
atomic_clear_rel_long(volatile long *p, long v)
|
|
{
|
|
_ATOMIC_CLEAR(long, p, v, memory_order_release);
|
|
}
|
|
|
|
/*
|
|
* Compare and set
|
|
*/
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
#define _ATOMIC_CMPSET(T, p, cmp, set, mo) \
|
|
std::atomic_##T *q = \
|
|
reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
|
|
rv = q->compare_exchange_strong(cmp, set, \
|
|
std::mo, std::memory_order_relaxed)
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
#define _ATOMIC_CMPSET(T, p, cmp, set, mo) \
|
|
atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
|
|
atomic_compare_exchange_strong_explicit(q, &cmp, set, \
|
|
mo, memory_order_relaxed)
|
|
#else
|
|
#define _ATOMIC_CMPSET(T, p, cmp, set, mo) \
|
|
rtems_interrupt_level level; \
|
|
rtems_interrupt_disable(level); \
|
|
rv = *p == cmp; \
|
|
if (rv) { \
|
|
*p = set; \
|
|
} \
|
|
rtems_interrupt_enable(level);
|
|
#endif
|
|
|
|
static inline int
|
|
atomic_cmpset_int(volatile int *p, int cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(int, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_acq_int(volatile int *p, int cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(int, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_rel_int(volatile int *p, int cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(int, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_32(volatile uint32_t *p, uint32_t cmp, uint32_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least32_t, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_acq_32(volatile uint32_t *p, uint32_t cmp, uint32_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least32_t, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_rel_32(volatile uint32_t *p, uint32_t cmp, uint32_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least32_t, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_64(volatile uint64_t *p, uint64_t cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least64_t, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_acq_64(volatile uint64_t *p, uint64_t cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least64_t, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_rel_64(volatile uint64_t *p, uint64_t cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uint_least64_t, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_long(volatile long *p, long cmp, long set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(long, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_acq_long(volatile long *p, long cmp, long set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(long, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_rel_long(volatile long *p, long cmp, long set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(long, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_ptr(volatile uintptr_t *p, uintptr_t cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uintptr_t, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_acq_ptr(volatile uintptr_t *p, uintptr_t cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uintptr_t, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_cmpset_rel_ptr(volatile uintptr_t *p, uintptr_t cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_CMPSET(uintptr_t, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
/*
|
|
* Fetch compare and set
|
|
*/
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
#define _ATOMIC_FCMPSET(T, p, cmp, set, mo) \
|
|
std::atomic_##T *q = \
|
|
reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
|
|
rv = q->compare_exchange_strong(*cmp, set, \
|
|
std::mo, std::memory_order_relaxed)
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
#define _ATOMIC_FCMPSET(T, p, cmp, set, mo) \
|
|
atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
|
|
atomic_compare_exchange_strong_explicit(q, cmp, set, \
|
|
mo, memory_order_relaxed)
|
|
#else
|
|
#define _ATOMIC_FCMPSET(T, p, cmp, set, mo) \
|
|
rtems_interrupt_level level; \
|
|
T actual; \
|
|
rtems_interrupt_disable(level); \
|
|
actual = *p; \
|
|
rv = actual == *cmp; \
|
|
*cmp = actual; \
|
|
if (rv) { \
|
|
*p = set; \
|
|
} \
|
|
rtems_interrupt_enable(level);
|
|
#endif
|
|
|
|
static inline int
|
|
atomic_fcmpset_int(volatile int *p, int *cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(int, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_acq_int(volatile int *p, int *cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(int, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_rel_int(volatile int *p, int *cmp, int set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(int, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_64(volatile uint64_t *p, uint64_t *cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uint_least64_t, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_acq_64(volatile uint64_t *p, uint64_t *cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uint_least64_t, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_rel_64(volatile uint64_t *p, uint64_t *cmp, uint64_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uint_least64_t, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
/* XXX Is IPL32 ok with the .*_ptr versions? */
|
|
static inline int
|
|
atomic_fcmpset_ptr(volatile uintptr_t *p, uintptr_t *cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uintptr_t, p, cmp, set, memory_order_seq_cst);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_acq_ptr(volatile uintptr_t *p, uintptr_t *cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uintptr_t, p, cmp, set, memory_order_acquire);
|
|
return (rv);
|
|
}
|
|
|
|
static inline int
|
|
atomic_fcmpset_rel_ptr(volatile uintptr_t *p, uintptr_t *cmp, uintptr_t set)
|
|
{
|
|
int rv;
|
|
_ATOMIC_FCMPSET(uintptr_t, p, cmp, set, memory_order_release);
|
|
return (rv);
|
|
}
|
|
|
|
/*
|
|
* Fetch add
|
|
*/
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
#define _ATOMIC_FETCHADD(T, p, v, mo) \
|
|
std::atomic_##T *q = \
|
|
reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
|
|
tmp = q->fetch_add(v, std::mo)
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
#define _ATOMIC_FETCHADD(T, p, v, mo) \
|
|
atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
|
|
tmp = atomic_fetch_add_explicit(q, v, mo)
|
|
#else
|
|
#define _ATOMIC_FETCHADD(T, p, v, mo) \
|
|
rtems_interrupt_level level; \
|
|
rtems_interrupt_disable(level); \
|
|
tmp = *p; \
|
|
*p += v; \
|
|
rtems_interrupt_enable(level);
|
|
#endif
|
|
|
|
static inline int
|
|
atomic_fetchadd_int(volatile int *p, int v)
|
|
{
|
|
int tmp;
|
|
_ATOMIC_FETCHADD(int, p, v, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
static inline uint32_t
|
|
atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
|
|
{
|
|
uint32_t tmp;
|
|
_ATOMIC_FETCHADD(uint_fast32_t, p, v, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
static inline uint64_t
|
|
atomic_fetchadd_64(volatile uint64_t *p, uint64_t v)
|
|
{
|
|
uint64_t tmp;
|
|
_ATOMIC_FETCHADD(uint_fast64_t, p, v, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
static inline long
|
|
atomic_fetchadd_long(volatile long *p, long v)
|
|
{
|
|
long tmp;
|
|
_ATOMIC_FETCHADD(long, p, v, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
/*
|
|
* Read and clear
|
|
*/
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
#define _ATOMIC_READANDCLEAR(T, p, mo) \
|
|
std::atomic_##T *q = \
|
|
reinterpret_cast<std::atomic_##T *>(const_cast<T *>(p)); \
|
|
tmp = q->exchange(0, std::mo)
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
#define _ATOMIC_READANDCLEAR(T, p, mo) \
|
|
atomic_##T *q = (atomic_##T *)RTEMS_DEVOLATILE(T *, p); \
|
|
tmp = atomic_exchange_explicit(q, 0, mo)
|
|
#else
|
|
#define _ATOMIC_READANDCLEAR(T, p, mo) \
|
|
rtems_interrupt_level level; \
|
|
rtems_interrupt_disable(level); \
|
|
tmp = *p; \
|
|
*p = 0; \
|
|
rtems_interrupt_enable(level);
|
|
#endif
|
|
|
|
static inline int
|
|
atomic_readandclear_int(volatile int *p)
|
|
{
|
|
int tmp;
|
|
_ATOMIC_READANDCLEAR(int, p, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
static inline uint32_t
|
|
atomic_readandclear_32(volatile uint32_t *p)
|
|
{
|
|
uint32_t tmp;
|
|
_ATOMIC_READANDCLEAR(uint_least32_t, p, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
static inline long
|
|
atomic_readandclear_long(volatile long *p)
|
|
{
|
|
long tmp;
|
|
_ATOMIC_READANDCLEAR(long, p, memory_order_seq_cst);
|
|
return (tmp);
|
|
}
|
|
|
|
/*
|
|
* Thread fence
|
|
*/
|
|
|
|
static inline void
|
|
atomic_thread_fence_acq(void)
|
|
{
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
std::atomic_thread_fence(std::memory_order_acquire);
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
atomic_thread_fence(memory_order_acquire);
|
|
#else
|
|
RTEMS_COMPILER_MEMORY_BARRIER();
|
|
#endif
|
|
}
|
|
|
|
static inline void
|
|
atomic_thread_fence_rel(void)
|
|
{
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
std::atomic_thread_fence(std::memory_order_release);
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
atomic_thread_fence(memory_order_release);
|
|
#else
|
|
RTEMS_COMPILER_MEMORY_BARRIER();
|
|
#endif
|
|
}
|
|
|
|
static inline void
|
|
atomic_thread_fence_acq_rel(void)
|
|
{
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
std::atomic_thread_fence(std::memory_order_acq_rel);
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
atomic_thread_fence(memory_order_acq_rel);
|
|
#else
|
|
RTEMS_COMPILER_MEMORY_BARRIER();
|
|
#endif
|
|
}
|
|
|
|
static inline void
|
|
atomic_thread_fence_seq_cst(void)
|
|
{
|
|
|
|
#if defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_ATOMIC)
|
|
std::atomic_thread_fence(std::memory_order_seq_cst);
|
|
#elif defined(_RTEMS_BSD_MACHINE_ATOMIC_USE_STDATOMIC)
|
|
atomic_thread_fence(memory_order_seq_cst);
|
|
#else
|
|
RTEMS_COMPILER_MEMORY_BARRIER();
|
|
#endif
|
|
}
|
|
|
|
#endif /* _RTEMS_BSD_MACHINE_ATOMIC_H_ */
|