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MIPS memcpy fixes.
http://sourceware.org/ml/newlib-cvs/2013-q1/msg00022.html http://sourceware.org/cgi-bin/cvsweb.cgi/src/newlib/libc/machine/mips/memcpy.S.diff?r1=1.2&r2=1.3&cvsroot=src http://sourceware.org/cgi-bin/cvsweb.cgi/src/newlib/libc/machine/mips/memcpy.S.diff?r1=1.1&r2=1.2&cvsroot=src
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@ -0,0 +1,25 @@
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===================================================================
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RCS file: /cvs/src/src/newlib/libc/machine/mips/memcpy.S,v
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retrieving revision 1.1
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retrieving revision 1.2
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diff -u -r1.1 -r1.2
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--- src/newlib/libc/machine/mips/memcpy.S 2012/12/11 21:37:59 1.1
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+++ src/newlib/libc/machine/mips/memcpy.S 2013/01/07 21:29:39 1.2
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@@ -56,7 +56,7 @@
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#endif
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#endif
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-#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
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+#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
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#ifndef DISABLE_DOUBLE
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#define USE_DOUBLE
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#endif
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@@ -203,6 +203,6 @@
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#define REG1 t1
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#define REG2 t2
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#define REG3 t3
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-#if _MIPS_SIM == _ABIO32
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+#if defined(_MIPS_SIM) && (_MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIO64)
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# define REG4 t4
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# define REG5 t5
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# define REG6 t6
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@ -0,0 +1,21 @@
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===================================================================
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RCS file: /cvs/src/src/newlib/libc/machine/mips/memcpy.S,v
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retrieving revision 1.2
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retrieving revision 1.3
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diff -u -r1.2 -r1.3
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--- src/newlib/libc/machine/mips/memcpy.S 2013/01/07 21:29:39 1.2
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+++ src/newlib/libc/machine/mips/memcpy.S 2013/02/19 07:31:04 1.3
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@@ -49,7 +49,10 @@
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#include <sys/asm.h>
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#endif
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-#if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
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- (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
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+/* Check to see if the MIPS architecture we are compiling for supports
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+ * prefetching.
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+ */
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+
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+#if (__mips == 4) || (__mips == 5) || (__mips == 32) || (__mips == 64)
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#ifndef DISABLE_PREFETCH
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#define USE_PREFETCH
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#endif
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