update(port/aic): sync code from luban lite

Signed-off-by: sakumisu <1203593632@qq.com>
This commit is contained in:
sakumisu 2025-05-06 21:45:03 +08:00
parent e29d87bb20
commit a41000a000
3 changed files with 668 additions and 283 deletions

File diff suppressed because it is too large Load Diff

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, Artinchip Technology Co., Ltd
* Copyright (c) 2022-2024, ArtInChip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -13,12 +13,19 @@
extern irqreturn_t USBD_IRQHandler(int irq, void * data);
uint32_t usbd_clk;
static unsigned char dma_sync_buffer[CACHE_LINE_SIZE] __attribute__((aligned(CACHE_LINE_SIZE)));
void usb_dc_sync_dma(void)
{
asm volatile("sw t0, (%0)" : : "r"(dma_sync_buffer));
csi_dcache_clean_range((phy_addr_t)(ptr_t)dma_sync_buffer, CACHE_LINE_SIZE);
}
void usb_dc_low_level_init(void)
{
/* set usb0 phy switch: Host/Device */
#ifdef AIC_USING_USB0_DEVICE
syscfg_usb_phy0_sw_host(0);
#if defined(AIC_USING_USB0_DEVICE) || defined(AIC_USING_USB0_OTG)
hal_syscfg_usb_phy0_sw_host(0);
#endif
/* set pin-mux */
@ -41,3 +48,13 @@ void usb_dc_low_level_init(void)
aicos_irq_enable(CONFIG_USB_AIC_DC_IRQ_NUM);
}
void usb_dc_low_level_deinit(void)
{
aicos_irq_disable(CONFIG_USB_AIC_DC_IRQ_NUM);
hal_reset_assert(CONFIG_USB_AIC_DC_PHY_RESET);
hal_reset_assert(CONFIG_USB_AIC_DC_RESET);
hal_clk_disable(CONFIG_USB_AIC_DC_PHY_CLK);
hal_clk_disable(CONFIG_USB_AIC_DC_CLK);
}

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2022, Artinchip Technology Co., Ltd
* Copyright (c) 2022-2024, Artinchip Technology Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -142,10 +142,19 @@ typedef struct {
#define EPS_NUM 5
#define PERIOD_IN_EP_NUM 2
#define TOTAL_FIFO_SIZE 0x3f6
#ifdef LPKG_CHERRYUSB_DEVICE_VIDEO_DVP_TEMPLATE
/* video_dvp_template must use 2K Bytes period_tx_fifo */
#define AIC_RX_FIFO_SIZE 0x99
#define AIC_NP_TX_FIFO_SIZE 0x100
#define AIC_PERIOD_TX_FIFO1_SIZE 0x200
#define AIC_PERIOD_TX_FIFO2_SIZE 0x0
#else
/* default configuration */
#define AIC_RX_FIFO_SIZE 0x119
#define AIC_NP_TX_FIFO_SIZE 0x100
#define AIC_PERIOD_TX_FIFO1_SIZE 0x100
#define AIC_PERIOD_TX_FIFO2_SIZE 0xDD
#endif
#define DEPCTL_TXFNUM_0 (0x0 << 22)
#define DEPCTL_TXFNUM_1 (0x1 << 22)
@ -244,9 +253,11 @@ typedef struct {
#define DIEPCTL0_NEXT_EP_BIT (11)
/* INEPINT/OUTEPINT device IN/OUT endpoint interrupt register */
#define CTRL_OUT_EP_SETUP_RCVD (0x1 << 15)
#define TXFIFO_EMP_INT (0x1 << 7)
#define INEP_NAKEFF (0x1 << 6)
#define BACK2BACK_SETUP_RECEIVED (0x1 << 6)
#define CTRL_OUT_EP_STATUS_PHASE_RCVD (0x1 << 5)
#define INTKNEPMIS (0x1 << 5)
#define INTKN_TXFEMP (0x1 << 4)
#define NON_ISO_IN_EP_TIMEOUT (0x1 << 3)