mirror of
https://github.com/sakumisu/CherryUSB.git
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266 lines
8.3 KiB
C
266 lines
8.3 KiB
C
/*
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* Copyright : (C) 2024 Phytium Information Technology, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 zhugengyu 2024/6/26 first commit
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*/
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#ifndef CHERRYUSB_CONFIG_H
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#define CHERRYUSB_CONFIG_H
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#include "rtconfig.h"
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/* ================ USB common Configuration ================ */
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#define CONFIG_USB_PRINTF(...) rt_kprintf(__VA_ARGS__)
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void *usb_sys_mem_malloc(size_t size);
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void usb_sys_mem_free(void *ptr);
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void *usb_sys_malloc_align(size_t align, size_t size);
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#define usb_malloc(size) usb_sys_mem_malloc(size)
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#define usb_free(ptr) usb_sys_mem_free(ptr)
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#define usb_align(align, size) usb_sys_malloc_align(align, size)
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unsigned long usb_hc_get_register_base(uint32_t id);
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unsigned long usb_dc_get_register_base(uint32_t id);
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#define CONFIG_USB_DBG_LEVEL USB_DBG_ERROR
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/* Enable print with color */
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#define CONFIG_USB_PRINTF_COLOR_ENABLE
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/* data align size when use dma */
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#ifndef CONFIG_USB_ALIGN_SIZE
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#define CONFIG_USB_ALIGN_SIZE 4
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#endif
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/* attribute data into no cache ram */
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#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable")))
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/* ================= USB Device Stack Configuration ================ */
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/* Ep0 in and out transfer buffer */
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#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
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#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
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#endif
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/* Setup packet log for debug */
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// #define CONFIG_USBDEV_SETUP_LOG_PRINT
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/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
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* Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
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*/
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// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY
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/* Check if the input descriptor is correct */
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// #define CONFIG_USBDEV_DESC_CHECK
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/* Enable test mode */
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// #define CONFIG_USBDEV_TEST_MODE
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#ifndef CONFIG_USBDEV_MSC_MAX_LUN
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#define CONFIG_USBDEV_MSC_MAX_LUN 1
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#endif
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#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
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#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 4096
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#endif
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#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
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#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
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#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
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#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
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#endif
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// #define CONFIG_USBDEV_MSC_THREAD
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#ifndef CONFIG_USBDEV_MSC_PRIO
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#define CONFIG_USBDEV_MSC_PRIO 4
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#endif
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#ifndef CONFIG_USBDEV_MSC_STACKSIZE
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#define CONFIG_USBDEV_MSC_STACKSIZE 8192
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
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#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
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#endif
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/* rndis transfer buffer size, must be a multiple of (1536 + 44)*/
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#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
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#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
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#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
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#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
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#endif
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#define CONFIG_USBDEV_RNDIS_USING_LWIP
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/* ================ USB HOST Stack Configuration ================== */
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#define CONFIG_USBHOST_MAX_RHPORTS 1
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#define CONFIG_USBHOST_MAX_EXTHUBS 0
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#define CONFIG_USBHOST_MAX_EHPORTS 8
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#define CONFIG_USBHOST_MAX_INTERFACES 8
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#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
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#define CONFIG_USBHOST_MAX_ENDPOINTS 8
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#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
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#define CONFIG_USBHOST_MAX_HID_CLASS 4
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#define CONFIG_USBHOST_MAX_MSC_CLASS 2
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#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1
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#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1
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#define CONFIG_USBHOST_DEV_NAMELEN 16
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#ifndef CONFIG_USBHOST_PSC_PRIO
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#define CONFIG_USBHOST_PSC_PRIO 0
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#endif
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#ifndef CONFIG_USBHOST_PSC_STACKSIZE
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#define CONFIG_USBHOST_PSC_STACKSIZE 8192
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#endif
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//#define CONFIG_USBHOST_GET_STRING_DESC
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// #define CONFIG_USBHOST_MSOS_ENABLE
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#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
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#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
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#endif
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/* Ep0 max transfer buffer */
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#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
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#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
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#endif
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#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
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#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
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#endif
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#ifndef CONFIG_USBHOST_MSC_TIMEOUT
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#define CONFIG_USBHOST_MSC_TIMEOUT 5000
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
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#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
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#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
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#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048)
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#endif
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#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
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// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
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#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
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#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
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#endif
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#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
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#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
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#endif
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/* ================ USB Device Port Configuration ================*/
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#ifndef CONFIG_USBDEV_MAX_BUS
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#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
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#endif
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#ifndef CONFIG_USBDEV_EP_NUM
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#define CONFIG_USBDEV_EP_NUM 8
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#endif
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/* ---------------- FSDEV Configuration ---------------- */
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//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
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/* ---------------- DWC2 Configuration ---------------- */
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/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
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* status information) + (2 * number of OUT endpoints) + 1 for Global NAK
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*/
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// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
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/* IN Endpoints Max packet Size / 4 */
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// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (512 / 4)
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// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
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/* ---------------- MUSB Configuration ---------------- */
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// #define CONFIG_USB_MUSB_SUNXI
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/* ================ USB Host Port Configuration ==================*/
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#ifndef CONFIG_INPUT_MOUSE_WHEEL
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#define CONFIG_INPUT_MOUSE_WHEEL
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#endif
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#ifndef CONFIG_USBHOST_MAX_BUS
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#define CONFIG_USBHOST_MAX_BUS 3
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#endif
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#ifndef CONFIG_USBHOST_PIPE_NUM
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#define CONFIG_USBHOST_PIPE_NUM 10
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#endif
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/* ---------------- XHCI Configuration ---------------- */
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#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
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/* ---------------- PUSB2 Configuration ---------------- */
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#define CONFIG_USB_PUSB2_BUS_NUM 3U
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#define CONFIG_USB_PUSB2_BUS_ID 0U
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#endif
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