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[hsimulator/risc-v] 初步移植FreeRTOS内核
This commit is contained in:
679
hbox/hsimulator/risc-v/rom/opensbi/FreeRTOSConfig.h
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679
hbox/hsimulator/risc-v/rom/opensbi/FreeRTOSConfig.h
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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||||
* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/*******************************************************************************
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* This file provides an example FreeRTOSConfig.h header file, inclusive of an
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* abbreviated explanation of each configuration item. Online and reference
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* documentation provides more information.
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* https://www.freertos.org/a00110.html
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*
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* Constant values enclosed in square brackets ('[' and ']') must be completed
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* before this file will build.
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*
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* Use the FreeRTOSConfig.h supplied with the RTOS port in use rather than this
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* generic file, if one is available.
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******************************************************************************/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/******************************************************************************/
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/* Hardware description related definitions. **********************************/
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/******************************************************************************/
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/* In most cases, configCPU_CLOCK_HZ must be set to the frequency of the clock
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* that drives the peripheral used to generate the kernels periodic tick
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* interrupt. The default value is set to 10MHz and matches the QEMU demo
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* settings. Your application will certainly need a different value so set this
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* correctly. This is very often, but not always, equal to the main system clock
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* frequency. */
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#define configCPU_CLOCK_HZ ( ( unsigned long ) 10000000 )
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/* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
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*
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* By default ARM Cortex-M ports generate the RTOS tick interrupt from the
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* Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
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* frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
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* not needed and should be left undefined. If the SysTick timer is clocked at a
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* different frequency to the MCU core then set configCPU_CLOCK_HZ to the MCU
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* clock frequency, as normal, and configSYSTICK_CLOCK_HZ to the SysTick clock
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* frequency. Not used if left undefined.
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* The default value is undefined (commented out). If you need this value bring
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* it back and set it to a suitable value. */
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/*
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#define configSYSTICK_CLOCK_HZ [Platform specific]
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*/
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/******************************************************************************/
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/* Scheduling behaviour related definitions. **********************************/
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/******************************************************************************/
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/* configTICK_RATE_HZ sets frequency of the tick interrupt in Hz, normally
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* calculated from the configCPU_CLOCK_HZ value. */
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#define configTICK_RATE_HZ 1000
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/* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling. Set
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* configUSE_PREEMPTION to 0 to use co-operative scheduling.
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* See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
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#define configUSE_PREEMPTION 1
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/* Set configUSE_TIME_SLICING to 1 to have the scheduler switch between Ready
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* state tasks of equal priority on every tick interrupt. Set
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* configUSE_TIME_SLICING to 0 to prevent the scheduler switching between Ready
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* state tasks just because there was a tick interrupt. See
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* https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
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#define configUSE_TIME_SLICING 0
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/* Set configUSE_PORT_OPTIMISED_TASK_SELECTION to 1 to select the next task to
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* run using an algorithm optimised to the instruction set of the target
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* hardware - normally using a count leading zeros assembly instruction. Set to
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* 0 to select the next task to run using a generic C algorithm that works for
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* all FreeRTOS ports. Not all FreeRTOS ports have this option. Defaults to 0
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* if left undefined. */
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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/* Set configUSE_TICKLESS_IDLE to 1 to use the low power tickless mode. Set to
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* 0 to keep the tick interrupt running at all times. Not all FreeRTOS ports
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* support tickless mode. See
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* https://www.freertos.org/low-power-tickless-rtos.html Defaults to 0 if left
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* undefined. */
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#define configUSE_TICKLESS_IDLE 0
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/* configMAX_PRIORITIES Sets the number of available task priorities. Tasks can
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* be assigned priorities of 0 to (configMAX_PRIORITIES - 1). Zero is the
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* lowest priority. */
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#define configMAX_PRIORITIES 32
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/* configMINIMAL_STACK_SIZE defines the size of the stack used by the Idle task
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* (in words, not in bytes!). The kernel does not use this constant for any
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* other purpose. Demo applications use the constant to make the demos somewhat
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* portable across hardware architectures. */
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#define configMINIMAL_STACK_SIZE 512
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/* configMAX_TASK_NAME_LEN sets the maximum length (in characters) of a task's
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* human readable name. Includes the NULL terminator. */
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#define configMAX_TASK_NAME_LEN 16
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/* Time is measured in 'ticks' - which is the number of times the tick interrupt
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* has executed since the RTOS kernel was started.
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* The tick count is held in a variable of type TickType_t.
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*
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* configTICK_TYPE_WIDTH_IN_BITS controls the type (and therefore bit-width) of
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* TickType_t:
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*
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* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_16_BITS causes
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* TickType_t to be defined (typedef'ed) as an unsigned 16-bit type.
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*
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* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_32_BITS causes
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* TickType_t to be defined (typedef'ed) as an unsigned 32-bit type.
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*
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* Defining configTICK_TYPE_WIDTH_IN_BITS as TICK_TYPE_WIDTH_64_BITS causes
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* TickType_t to be defined (typedef'ed) as an unsigned 64-bit type. */
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#if __riscv_xlen == 64
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#define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_64_BITS
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#else
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#define configTICK_TYPE_WIDTH_IN_BITS TICK_TYPE_WIDTH_32_BITS
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#endif
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/* Set configIDLE_SHOULD_YIELD to 1 to have the Idle task yield to an
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* application task if there is an Idle priority (priority 0) application task
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* that can run. Set to 0 to have the Idle task use all of its timeslice.
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* Default to 1 if left undefined. */
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#define configIDLE_SHOULD_YIELD 1
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/* Each task has an array of task notifications.
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* configTASK_NOTIFICATION_ARRAY_ENTRIES sets the number of indexes in the
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* array. See https://www.freertos.org/RTOS-task-notifications.html Defaults to
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* 1 if left undefined. */
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#define configTASK_NOTIFICATION_ARRAY_ENTRIES 1
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/* configQUEUE_REGISTRY_SIZE sets the maximum number of queues and semaphores
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* that can be referenced from the queue registry. Only required when using a
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* kernel aware debugger. Defaults to 0 if left undefined. */
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#define configQUEUE_REGISTRY_SIZE 0
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/* Set configENABLE_BACKWARD_COMPATIBILITY to 1 to map function names and
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* datatypes from old version of FreeRTOS to their latest equivalent. Defaults
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* to 1 if left undefined. */
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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/* Each task has its own array of pointers that can be used as thread local
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* storage. configNUM_THREAD_LOCAL_STORAGE_POINTERS set the number of indexes
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* in the array. See
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* https://www.freertos.org/thread-local-storage-pointers.html Defaults to 0 if
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* left undefined. */
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#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0
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/* When configUSE_MINI_LIST_ITEM is set to 0, MiniListItem_t and ListItem_t are
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* both the same. When configUSE_MINI_LIST_ITEM is set to 1, MiniListItem_t
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* contains 3 fewer fields than ListItem_t which saves some RAM at the cost of
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* violating strict aliasing rules which some compilers depend on for
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* optimization. Defaults to 1 if left undefined. */
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#define configUSE_MINI_LIST_ITEM 1
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/* Sets the type used by the parameter to xTaskCreate() that specifies the stack
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* size of the task being created. The same type is used to return information
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* about stack usage in various other API calls. Defaults to size_t if left
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* undefined. */
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#define configSTACK_DEPTH_TYPE size_t
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/* configMESSAGE_BUFFER_LENGTH_TYPE sets the type used to store the length of
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* each message written to a FreeRTOS message buffer (the length is also written
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* to the message buffer. Defaults to size_t if left undefined - but that may
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* waste space if messages never go above a length that could be held in a
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* uint8_t. */
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#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
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/* If configHEAP_CLEAR_MEMORY_ON_FREE is set to 1, then blocks of memory
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* allocated using pvPortMalloc() will be cleared (i.e. set to zero) when freed
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* using vPortFree(). Defaults to 0 if left undefined. */
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#define configHEAP_CLEAR_MEMORY_ON_FREE 1
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/* vTaskList and vTaskGetRunTimeStats APIs take a buffer as a parameter and
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* assume that the length of the buffer is configSTATS_BUFFER_MAX_LENGTH.
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* Defaults to 0xFFFF if left undefined. New applications are recommended to use
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* vTaskListTasks and vTaskGetRunTimeStatistics APIs instead and supply the
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* length of the buffer explicitly to avoid memory corruption. */
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#define configSTATS_BUFFER_MAX_LENGTH 0xFFFF
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/* Set configUSE_NEWLIB_REENTRANT to 1 to have a newlib reent structure
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* allocated for each task. Set to 0 to not support newlib reent structures.
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* Default to 0 if left undefined.
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*
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* Note Newlib support has been included by popular demand, but is not used or
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* tested by the FreeRTOS maintainers themselves. FreeRTOS is not responsible
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* for resulting newlib operation. User must be familiar with newlib and must
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* provide system-wide implementations of the necessary stubs. Note that (at the
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* time of writing) the current newlib design implements a system-wide malloc()
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* that must be provided with locks. */
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#define configUSE_NEWLIB_REENTRANT 0
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/******************************************************************************/
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/* Software timer related definitions. ****************************************/
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/******************************************************************************/
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/* Set configUSE_TIMERS to 1 to include software timer functionality in the
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* build. Set to 0 to exclude software timer functionality from the build. The
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* FreeRTOS/source/timers.c source file must be included in the build if
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* configUSE_TIMERS is set to 1. Default to 0 if left undefined. See
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* https://www.freertos.org/RTOS-software-timer.html. */
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#define configUSE_TIMERS 1
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/* configTIMER_TASK_PRIORITY sets the priority used by the timer task. Only
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* used if configUSE_TIMERS is set to 1. The timer task is a standard FreeRTOS
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* task, so its priority is set like any other task. See
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* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
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* used if configUSE_TIMERS is set to 1. */
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#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
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/* configTIMER_TASK_STACK_DEPTH sets the size of the stack allocated to the
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* timer task (in words, not in bytes!). The timer task is a standard FreeRTOS
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* task. See
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* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
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* used if configUSE_TIMERS is set to 1. */
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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/* configTIMER_QUEUE_LENGTH sets the length of the queue (the number of discrete
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* items the queue can hold) used to send commands to the timer task. See
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* https://www.freertos.org/RTOS-software-timer-service-daemon-task.html Only
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* used if configUSE_TIMERS is set to 1. */
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#define configTIMER_QUEUE_LENGTH 256
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/******************************************************************************/
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/* Event Group related definitions. *******************************************/
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/******************************************************************************/
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/* Set configUSE_EVENT_GROUPS to 1 to include event group functionality in the
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* build. Set to 0 to exclude event group functionality from the build. The
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* FreeRTOS/source/event_groups.c source file must be included in the build if
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* configUSE_EVENT_GROUPS is set to 1. Defaults to 1 if left undefined. */
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#define configUSE_EVENT_GROUPS 1
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/******************************************************************************/
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/* Stream Buffer related definitions. *****************************************/
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/******************************************************************************/
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/* Set configUSE_STREAM_BUFFERS to 1 to include stream buffer functionality in
|
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* the build. Set to 0 to exclude event group functionality from the build. The
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* FreeRTOS/source/stream_buffer.c source file must be included in the build if
|
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* configUSE_STREAM_BUFFERS is set to 1. Defaults to 1 if left undefined. */
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#define configUSE_STREAM_BUFFERS 1
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/******************************************************************************/
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/* Memory allocation related definitions. *************************************/
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/******************************************************************************/
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/* Set configSUPPORT_STATIC_ALLOCATION to 1 to include FreeRTOS API functions
|
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* that create FreeRTOS objects (tasks, queues, etc.) using statically allocated
|
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* memory in the build. Set to 0 to exclude the ability to create statically
|
||||
* allocated objects from the build. Defaults to 0 if left undefined. See
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* https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
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#define configSUPPORT_STATIC_ALLOCATION 1
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/* Set configSUPPORT_DYNAMIC_ALLOCATION to 1 to include FreeRTOS API functions
|
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* that create FreeRTOS objects (tasks, queues, etc.) using dynamically
|
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* allocated memory in the build. Set to 0 to exclude the ability to create
|
||||
* dynamically allocated objects from the build. Defaults to 1 if left
|
||||
* undefined. See
|
||||
* https://www.freertos.org/Static_Vs_Dynamic_Memory_Allocation.html. */
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#define configSUPPORT_DYNAMIC_ALLOCATION 1
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/* Sets the total size of the FreeRTOS heap, in bytes, when heap_1.c, heap_2.c
|
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* or heap_4.c are included in the build. This value is defaulted to 4096 bytes
|
||||
* but it must be tailored to each application. Note the heap will appear in
|
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* the .bss section. See https://www.freertos.org/a00111.html. */
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#define configTOTAL_HEAP_SIZE 4096
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/* Set configAPPLICATION_ALLOCATED_HEAP to 1 to have the application allocate
|
||||
* the array used as the FreeRTOS heap. Set to 0 to have the linker allocate
|
||||
* the array used as the FreeRTOS heap. Defaults to 0 if left undefined. */
|
||||
#define configAPPLICATION_ALLOCATED_HEAP 0
|
||||
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||||
/* Set configSTACK_ALLOCATION_FROM_SEPARATE_HEAP to 1 to have task stacks
|
||||
* allocated from somewhere other than the FreeRTOS heap. This is useful if you
|
||||
* want to ensure stacks are held in fast memory. Set to 0 to have task stacks
|
||||
* come from the standard FreeRTOS heap. The application writer must provide
|
||||
* implementations for pvPortMallocStack() and vPortFreeStack() if set to 1.
|
||||
* Defaults to 0 if left undefined. */
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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||||
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||||
/* Set configENABLE_HEAP_PROTECTOR to 1 to enable bounds checking and
|
||||
* obfuscation to internal heap block pointers in heap_4.c and heap_5.c to help
|
||||
* catch pointer corruptions. Defaults to 0 if left undefined. */
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||||
#define configENABLE_HEAP_PROTECTOR 0
|
||||
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||||
/******************************************************************************/
|
||||
/* Interrupt nesting behaviour configuration. *********************************/
|
||||
/******************************************************************************/
|
||||
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||||
/* configKERNEL_INTERRUPT_PRIORITY sets the priority of the tick and context
|
||||
* switch performing interrupts. Not supported by all FreeRTOS ports. See
|
||||
* https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific to
|
||||
* ARM Cortex-M devices. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 0
|
||||
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||||
/* configMAX_SYSCALL_INTERRUPT_PRIORITY sets the interrupt priority above which
|
||||
* FreeRTOS API calls must not be made. Interrupts above this priority are
|
||||
* never disabled, so never delayed by RTOS activity. The default value is set
|
||||
* to the highest interrupt priority (0). Not supported by all FreeRTOS ports.
|
||||
* See https://www.freertos.org/RTOS-Cortex-M3-M4.html for information specific
|
||||
* to ARM Cortex-M devices. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 0
|
||||
|
||||
/* Another name for configMAX_SYSCALL_INTERRUPT_PRIORITY - the name used depends
|
||||
* on the FreeRTOS port. */
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 0
|
||||
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||||
/******************************************************************************/
|
||||
/* Hook and callback function related definitions. ****************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set the following configUSE_* constants to 1 to include the named hook
|
||||
* functionality in the build. Set to 0 to exclude the hook functionality from
|
||||
* the build. The application writer is responsible for providing the hook
|
||||
* function for any set to 1. See https://www.freertos.org/a00016.html. */
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
||||
#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
|
||||
|
||||
/* Set configUSE_SB_COMPLETED_CALLBACK to 1 to have send and receive completed
|
||||
* callbacks for each instance of a stream buffer or message buffer. When the
|
||||
* option is set to 1, APIs xStreamBufferCreateWithCallback() and
|
||||
* xStreamBufferCreateStaticWithCallback() (and likewise APIs for message
|
||||
* buffer) can be used to create a stream buffer or message buffer instance
|
||||
* with application provided callbacks. Defaults to 0 if left undefined. */
|
||||
#define configUSE_SB_COMPLETED_CALLBACK 0
|
||||
|
||||
/* Set configCHECK_FOR_STACK_OVERFLOW to 1 or 2 for FreeRTOS to check for a
|
||||
* stack overflow at the time of a context switch. Set to 0 to not look for a
|
||||
* stack overflow. If configCHECK_FOR_STACK_OVERFLOW is 1 then the check only
|
||||
* looks for the stack pointer being out of bounds when a task's context is
|
||||
* saved to its stack - this is fast but somewhat ineffective. If
|
||||
* configCHECK_FOR_STACK_OVERFLOW is 2 then the check looks for a pattern
|
||||
* written to the end of a task's stack having been overwritten. This is
|
||||
* slower, but will catch most (but not all) stack overflows. The application
|
||||
* writer must provide the stack overflow callback when
|
||||
* configCHECK_FOR_STACK_OVERFLOW is set to 1. See
|
||||
* https://www.freertos.org/Stacks-and-stack-overflow-checking.html Defaults to
|
||||
* 0 if left undefined. */
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
|
||||
/******************************************************************************/
|
||||
/* Run time and task stats gathering related definitions. *********************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configGENERATE_RUN_TIME_STATS to 1 to have FreeRTOS collect data on the
|
||||
* processing time used by each task. Set to 0 to not collect the data. The
|
||||
* application writer needs to provide a clock source if set to 1. Defaults to
|
||||
* 0 if left undefined. See https://www.freertos.org/rtos-run-time-stats.html.
|
||||
*/
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
|
||||
/* Set configUSE_TRACE_FACILITY to include additional task structure members
|
||||
* are used by trace and visualisation functions and tools. Set to 0 to exclude
|
||||
* the additional information from the structures. Defaults to 0 if left
|
||||
* undefined. */
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
|
||||
/* Set to 1 to include the vTaskList() and vTaskGetRunTimeStats() functions in
|
||||
* the build. Set to 0 to exclude these functions from the build. These two
|
||||
* functions introduce a dependency on string formatting functions that would
|
||||
* otherwise not exist - hence they are kept separate. Defaults to 0 if left
|
||||
* undefined. */
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* Co-routine related definitions. ********************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configUSE_CO_ROUTINES to 1 to include co-routine functionality in the
|
||||
* build, or 0 to omit co-routine functionality from the build. To include
|
||||
* co-routines, croutine.c must be included in the project. Defaults to 0 if
|
||||
* left undefined. */
|
||||
#define configUSE_CO_ROUTINES 1
|
||||
|
||||
/* configMAX_CO_ROUTINE_PRIORITIES defines the number of priorities available
|
||||
* to the application co-routines. Any number of co-routines can share the same
|
||||
* priority. Defaults to 0 if left undefined. */
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Debugging assistance. ******************************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* configASSERT() has the same semantics as the standard C assert(). It can
|
||||
* either be defined to take an action when the assertion fails, or not defined
|
||||
* at all (i.e. comment out or delete the definitions) to completely remove
|
||||
* assertions. configASSERT() can be defined to anything you want, for example
|
||||
* you can call a function if an assert fails that passes the filename and line
|
||||
* number of the failing assert (for example, "vAssertCalled( __FILE__, __LINE__
|
||||
* )" or it can simple disable interrupts and sit in a loop to halt all
|
||||
* execution on the failing line for viewing in a debugger. */
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#define configASSERT( x ) \
|
||||
if( ( x ) == 0 ) \
|
||||
{ \
|
||||
taskDISABLE_INTERRUPTS(); \
|
||||
for( ; ; ) \
|
||||
; \
|
||||
}
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/******************************************************************************/
|
||||
/* FreeRTOS MPU specific definitions. *****************************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* If configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS is set to 1 then
|
||||
* the application writer can provide functions that execute in privileged mode.
|
||||
* See:
|
||||
* https://www.freertos.org/a00110.html#configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
|
||||
* Defaults to 0 if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0
|
||||
|
||||
/* Set configTOTAL_MPU_REGIONS to the number of MPU regions implemented on your
|
||||
* target hardware. Normally 8 or 16. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. Defaults to 8 if left
|
||||
* undefined. */
|
||||
#define configTOTAL_MPU_REGIONS 8
|
||||
|
||||
/* configTEX_S_C_B_FLASH allows application writers to override the default
|
||||
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
|
||||
* for the MPU region covering Flash. Defaults to 0x07UL (which means TEX=000,
|
||||
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configTEX_S_C_B_FLASH 0x07UL
|
||||
|
||||
/* configTEX_S_C_B_SRAM allows application writers to override the default
|
||||
* values for the for TEX, Shareable (S), Cacheable (C) and Bufferable (B) bits
|
||||
* for the MPU region covering RAM. Defaults to 0x07UL (which means TEX=000,
|
||||
* S=1, C=1, B=1) if left undefined. Only used by the FreeRTOS Cortex-M MPU
|
||||
* ports, not the standard ARMv7-M Cortex-M port. */
|
||||
#define configTEX_S_C_B_SRAM 0x07UL
|
||||
|
||||
/* Set configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY to 0 to prevent any privilege
|
||||
* escalations originating from outside of the kernel code itself. Set to 1 to
|
||||
* allow application tasks to raise privilege. Defaults to 1 if left undefined.
|
||||
* Only used by the FreeRTOS Cortex-M MPU ports, not the standard ARMv7-M
|
||||
* Cortex-M port. */
|
||||
#define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 1
|
||||
|
||||
/* Set configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS to 1 to allow unprivileged
|
||||
* tasks enter critical sections (effectively mask interrupts). Set to 0 to
|
||||
* prevent unprivileged tasks entering critical sections. Defaults to 1 if left
|
||||
* undefined. Only used by the FreeRTOS Cortex-M MPU ports, not the standard
|
||||
* ARMv7-M Cortex-M port. */
|
||||
#define configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS 0
|
||||
|
||||
/* FreeRTOS Kernel version 10.6.0 introduced a new v2 MPU wrapper, namely
|
||||
* mpu_wrappers_v2.c. Set configUSE_MPU_WRAPPERS_V1 to 0 to use the new v2 MPU
|
||||
* wrapper. Set configUSE_MPU_WRAPPERS_V1 to 1 to use the old v1 MPU wrapper
|
||||
* (mpu_wrappers.c). Defaults to 0 if left undefined. */
|
||||
#define configUSE_MPU_WRAPPERS_V1 0
|
||||
|
||||
/* When using the v2 MPU wrapper, set configPROTECTED_KERNEL_OBJECT_POOL_SIZE to
|
||||
* the total number of kernel objects, which includes tasks, queues, semaphores,
|
||||
* mutexes, event groups, timers, stream buffers and message buffers, in your
|
||||
* application. The application will not be able to have more than
|
||||
* configPROTECTED_KERNEL_OBJECT_POOL_SIZE kernel objects at any point of
|
||||
* time. */
|
||||
#define configPROTECTED_KERNEL_OBJECT_POOL_SIZE 256
|
||||
|
||||
/* When using the v2 MPU wrapper, set configSYSTEM_CALL_STACK_SIZE to the size
|
||||
* of the system call stack in words. Each task has a statically allocated
|
||||
* memory buffer of this size which is used as the stack to execute system
|
||||
* calls. For example, if configSYSTEM_CALL_STACK_SIZE is defined as 128 and
|
||||
* there are 10 tasks in the application, the total amount of memory used for
|
||||
* system call stacks is 128 * 10 = 1280 words. */
|
||||
#define configSYSTEM_CALL_STACK_SIZE 4096
|
||||
|
||||
/* When using the v2 MPU wrapper, set configENABLE_ACCESS_CONTROL_LIST to 1 to
|
||||
* enable Access Control List (ACL) feature. When ACL is enabled, an
|
||||
* unprivileged task by default does not have access to any kernel object other
|
||||
* than itself. The application writer needs to explicitly grant the
|
||||
* unprivileged task access to the kernel objects it needs using the APIs
|
||||
* provided for the same. Defaults to 0 if left undefined. */
|
||||
#define configENABLE_ACCESS_CONTROL_LIST 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* SMP( Symmetric MultiProcessing ) Specific Configuration definitions. *******/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configNUMBER_OF_CORES to the number of available processor cores.
|
||||
* Defaults to 1 if left undefined. */
|
||||
|
||||
/*
|
||||
#define configNUMBER_OF_CORES [Num of available cores]
|
||||
*/
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configRUN_MULTIPLE_PRIORITIES to 0 to allow multiple tasks to run
|
||||
* simultaneously only if they do not have equal priority, thereby maintaining
|
||||
* the paradigm of a lower priority task never running if a higher priority task
|
||||
* is able to run. If configRUN_MULTIPLE_PRIORITIES is set to 1, multiple tasks
|
||||
* with different priorities may run simultaneously - so a higher and lower
|
||||
* priority task may run on different cores at the same time. */
|
||||
#define configRUN_MULTIPLE_PRIORITIES 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configUSE_CORE_AFFINITY to 1 to enable core affinity feature. When core
|
||||
* affinity feature is enabled, the vTaskCoreAffinitySet and
|
||||
* vTaskCoreAffinityGet APIs can be used to set and retrieve which cores a task
|
||||
* can run on. If configUSE_CORE_AFFINITY is set to 0 then the FreeRTOS
|
||||
* scheduler is free to run any task on any available core. */
|
||||
#define configUSE_CORE_AFFINITY 0
|
||||
|
||||
/* When using SMP with core affinity feature enabled, set
|
||||
* configTASK_DEFAULT_CORE_AFFINITY to change the default core affinity mask for
|
||||
* tasks created without an affinity mask specified. Setting the define to 1
|
||||
* would make such tasks run on core 0 and setting it to (1 <<
|
||||
* portGET_CORE_ID()) would make such tasks run on the current core. This config
|
||||
* value is useful, if swapping tasks between cores is not supported (e.g.
|
||||
* Tricore) or if legacy code should be controlled. Defaults to tskNO_AFFINITY
|
||||
* if left undefined. */
|
||||
#define configTASK_DEFAULT_CORE_AFFINITY tskNO_AFFINITY
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), if
|
||||
* configUSE_TASK_PREEMPTION_DISABLE is set to 1, individual tasks can be set to
|
||||
* either pre-emptive or co-operative mode using the vTaskPreemptionDisable and
|
||||
* vTaskPreemptionEnable APIs. */
|
||||
#define configUSE_TASK_PREEMPTION_DISABLE 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
|
||||
* configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
|
||||
* the passive idle task hook to add background functionality without the
|
||||
* overhead of a separate task. Defaults to 0 if left undefined. */
|
||||
#define configUSE_PASSIVE_IDLE_HOOK 0
|
||||
|
||||
/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one),
|
||||
* configTIMER_SERVICE_TASK_CORE_AFFINITY allows the application writer to set
|
||||
* the core affinity of the RTOS Daemon/Timer Service task. Defaults to
|
||||
* tskNO_AFFINITY if left undefined. */
|
||||
#define configTIMER_SERVICE_TASK_CORE_AFFINITY tskNO_AFFINITY
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv8-M secure side port related definitions. ******************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* secureconfigMAX_SECURE_CONTEXTS define the maximum number of tasks that can
|
||||
* call into the secure side of an ARMv8-M chip. Not used by any other ports.
|
||||
*/
|
||||
#define secureconfigMAX_SECURE_CONTEXTS 5
|
||||
|
||||
/* Defines the kernel provided implementation of
|
||||
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory()
|
||||
* to provide the memory that is used by the Idle task and Timer task
|
||||
* respectively. The application can provide it's own implementation of
|
||||
* vApplicationGetIdleTaskMemory() and vApplicationGetTimerTaskMemory() by
|
||||
* setting configKERNEL_PROVIDED_STATIC_MEMORY to 0 or leaving it undefined. */
|
||||
#define configKERNEL_PROVIDED_STATIC_MEMORY 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv8-M port Specific Configuration definitions. ***************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configENABLE_TRUSTZONE to 1 when running FreeRTOS on the non-secure side
|
||||
* to enable the TrustZone support in FreeRTOS ARMv8-M ports which allows the
|
||||
* non-secure FreeRTOS tasks to call the (non-secure callable) functions
|
||||
* exported from secure side. */
|
||||
#define configENABLE_TRUSTZONE 0
|
||||
|
||||
/* If the application writer does not want to use TrustZone, but the hardware
|
||||
* does not support disabling TrustZone then the entire application (including
|
||||
* the FreeRTOS scheduler) can run on the secure side without ever branching to
|
||||
* the non-secure side. To do that, in addition to setting
|
||||
* configENABLE_TRUSTZONE to 0, also set configRUN_FREERTOS_SECURE_ONLY to 1. */
|
||||
#define configRUN_FREERTOS_SECURE_ONLY 1
|
||||
|
||||
/* Set configENABLE_MPU to 1 to enable the Memory Protection Unit (MPU), or 0
|
||||
* to leave the Memory Protection Unit disabled. */
|
||||
#define configENABLE_MPU 0
|
||||
|
||||
/* Set configENABLE_FPU to 1 to enable the Floating Point Unit (FPU), or 0
|
||||
* to leave the Floating Point Unit disabled. */
|
||||
#define configENABLE_FPU 1
|
||||
|
||||
/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE)
|
||||
* support, or 0 to leave the MVE support disabled. This option is only
|
||||
* applicable to Cortex-M55 and Cortex-M85 ports as M-Profile Vector Extension
|
||||
* (MVE) is available only on these architectures. configENABLE_MVE must be left
|
||||
* undefined, or defined to 0 for the Cortex-M23,Cortex-M33 and Cortex-M35P
|
||||
* ports. */
|
||||
#define configENABLE_MVE 0
|
||||
|
||||
/******************************************************************************/
|
||||
/* ARMv7-M and ARMv8-M port Specific Configuration definitions. ***************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set configCHECK_HANDLER_INSTALLATION to 1 to enable additional asserts to
|
||||
* verify that the application has correctly installed FreeRTOS interrupt
|
||||
* handlers.
|
||||
*
|
||||
* An application can install FreeRTOS interrupt handlers in one of the
|
||||
* following ways:
|
||||
* 1. Direct Routing - Install the functions vPortSVCHandler and
|
||||
* xPortPendSVHandler for SVC call and PendSV interrupts respectively.
|
||||
* 2. Indirect Routing - Install separate handlers for SVC call and PendSV
|
||||
* interrupts and route program control from those
|
||||
* handlers to vPortSVCHandler and xPortPendSVHandler functions. The
|
||||
* applications that use Indirect Routing must set
|
||||
* configCHECK_HANDLER_INSTALLATION to 0.
|
||||
*
|
||||
* Defaults to 1 if left undefined. */
|
||||
#define configCHECK_HANDLER_INSTALLATION 1
|
||||
|
||||
/******************************************************************************/
|
||||
/* Definitions that include or exclude functionality. *************************/
|
||||
/******************************************************************************/
|
||||
|
||||
/* Set the following configUSE_* constants to 1 to include the named feature in
|
||||
* the build, or 0 to exclude the named feature from the build. */
|
||||
#define configUSE_TASK_NOTIFICATIONS 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configUSE_QUEUE_SETS 1
|
||||
#define configUSE_APPLICATION_TASK_TAG 1
|
||||
|
||||
/* USE_POSIX_ERRNO enables the task global FreeRTOS_errno variable which will
|
||||
* contain the most recent error for that task. */
|
||||
#define configUSE_POSIX_ERRNO 0
|
||||
|
||||
/* Set the following INCLUDE_* constants to 1 to include the named API function,
|
||||
* or 0 to exclude the named API function. Most linkers will remove unused
|
||||
* functions even when the constant is 1. */
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_xTaskAbortDelay 1
|
||||
#define INCLUDE_xTaskGetHandle 1
|
||||
#define INCLUDE_xTaskResumeFromISR 1
|
||||
|
||||
/*
|
||||
* 定义MTIME、MITME映射地址（0表示不启用）
|
||||
*/
|
||||
#define configMTIME_BASE_ADDRESS 0
|
||||
#define configMTIMECMP_BASE_ADDRESS 0
|
||||
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
@@ -0,0 +1,69 @@
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* The FreeRTOS kernel's RISC-V port is split between the the code that is
|
||||
* common across all currently supported RISC-V chips (implementations of the
|
||||
* RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
|
||||
*
|
||||
* + FreeRTOS\Source\portable\GCC\RISC-V\portASM.S contains the code that
|
||||
* is common to all currently supported RISC-V chips. There is only one
|
||||
* portASM.S file because the same file is built for all RISC-V target chips.
|
||||
*
|
||||
* + Header files called freertos_risc_v_chip_specific_extensions.h contain the
|
||||
* code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
|
||||
* chip. There are multiple freertos_risc_v_chip_specific_extensions.h files
|
||||
* as there are multiple RISC-V chip implementations.
|
||||
*
|
||||
* !!!NOTE!!!
|
||||
* TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
|
||||
* HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the
|
||||
* compiler's!) include path. For example, if the chip in use includes a core
|
||||
* local interrupter (CLINT) and does not include any chip specific register
|
||||
* extensions then add the path below to the assembler's include path:
|
||||
* FreeRTOS\Source\portable\GCC\RISC-V\chip_specific_extensions\RISCV_MTIME_CLINT_no_extensions
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __FREERTOS_RISC_V_EXTENSIONS_H__
|
||||
#define __FREERTOS_RISC_V_EXTENSIONS_H__
|
||||
|
||||
#define portasmHAS_SIFIVE_CLINT 0
|
||||
#define portasmHAS_MTIME 0
|
||||
#define portasmADDITIONAL_CONTEXT_SIZE 0
|
||||
|
||||
.macro portasmSAVE_ADDITIONAL_REGISTERS
|
||||
/* No additional registers to save, so this macro does nothing. */
|
||||
.endm
|
||||
|
||||
.macro portasmRESTORE_ADDITIONAL_REGISTERS
|
||||
/* No additional registers to restore, so this macro does nothing. */
|
||||
.endm
|
||||
|
||||
#endif /* __FREERTOS_RISC_V_EXTENSIONS_H__ */
|
||||
@@ -4,48 +4,48 @@
|
||||
#ifdef HRC_ENABLED
|
||||
#include "hrc.h"
|
||||
#endif // HRC_ENABLED
|
||||
#include FREERTOS_KERNEL_FREERTOS_HEADER
|
||||
#include FREERTOS_KERNEL_TASK_HEADER
|
||||
#include FREERTOS_KERNEL_TIMERS_HEADER
|
||||
#include FREERTOS_KERNEL_QUEUE_HEADER
|
||||
#include FREERTOS_KERNEL_SEMPHR_HEADER
|
||||
#include FREERTOS_KERNEL_CROUTINE_HEADER
|
||||
#include FREERTOS_KERNEL_LIST_HEADER
|
||||
#include FREERTOS_KERNEL_EVENT_GROUPS_HEADER
|
||||
|
||||
hdefaults_tick_t hbox_tick_get(void)
|
||||
{
|
||||
/*
|
||||
* TODO:确定系数,默认为aclint-mtimer @ 10000000Hz,
|
||||
*/
|
||||
#if defined(HDEFAULTS_ARCH_RISCV64)
|
||||
return sbi_rdtime()/10000;
|
||||
#else
|
||||
{
|
||||
hdefaults_mutex_lock(NULL);
|
||||
static uint64_t mtime_base=0;
|
||||
uint64_t current_mtime=(mtime_base&(0xFFFFFFFF00000000))+sbi_rdtime();
|
||||
if(current_mtime < mtime_base)
|
||||
{
|
||||
current_mtime+=(1ULL<<32);
|
||||
}
|
||||
mtime_base=current_mtime;
|
||||
hdefaults_mutex_unlock(NULL);
|
||||
return current_mtime/10000;
|
||||
}
|
||||
#endif
|
||||
return xTaskGetTickCount();
|
||||
}
|
||||
|
||||
static SemaphoreHandle_t g_lock=NULL;
|
||||
|
||||
void hbox_enter_critical()
|
||||
{
|
||||
|
||||
if(g_lock==NULL)
|
||||
{
|
||||
g_lock=xSemaphoreCreateRecursiveMutex();
|
||||
xSemaphoreTake(g_lock,portMAX_DELAY);
|
||||
}
|
||||
else
|
||||
{
|
||||
xSemaphoreTake(g_lock,portMAX_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
void hbox_exit_critical()
|
||||
{
|
||||
|
||||
xSemaphoreGive(g_lock);
|
||||
}
|
||||
|
||||
void * hbox_malloc(size_t bytes)
|
||||
{
|
||||
return malloc(bytes);
|
||||
return pvPortMalloc(bytes);
|
||||
}
|
||||
|
||||
void hbox_free(void *ptr)
|
||||
{
|
||||
free(ptr);
|
||||
vPortFree(ptr);
|
||||
}
|
||||
|
||||
|
||||
@@ -113,8 +113,7 @@ static int hbox_sleep_entry(int argc,const char *argv[])
|
||||
int n=atoi(argv[1]);
|
||||
if(n>0)
|
||||
{
|
||||
hdefaults_tick_t start=hdefaults_tick_get();
|
||||
while(hdefaults_tick_get()-start < n*1000);
|
||||
vTaskDelay(n*1000);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
@@ -33,6 +33,22 @@
|
||||
*/
|
||||
#define HRUNTIME_USING_SYMBOL_SECTION 1
|
||||
|
||||
/*
|
||||
* 不启用看门狗（在FreeRTOS空闲钩子中启用）
|
||||
*/
|
||||
#define HRUNTIME_NO_SOFTWATCHDOG 1
|
||||
|
||||
/*
|
||||
* 启用FreeRTOS内核
|
||||
*/
|
||||
#define FREERTOS_KERNEL 1
|
||||
|
||||
|
||||
/*
|
||||
* 选择FreeRTOS内核 heap_3
|
||||
*/
|
||||
#define FREERTOS_KERNEL_MEMMANG_HEAP 3
|
||||
|
||||
/*
|
||||
* 使用自定义的putchar
|
||||
*/
|
||||
|
||||
@@ -3,23 +3,66 @@
|
||||
#include "hbox.h"
|
||||
#include "opensbi_port.h"
|
||||
#include "ctype.h"
|
||||
#include FREERTOS_KERNEL_FREERTOS_HEADER
|
||||
#include FREERTOS_KERNEL_TASK_HEADER
|
||||
#include FREERTOS_KERNEL_TIMERS_HEADER
|
||||
#include FREERTOS_KERNEL_QUEUE_HEADER
|
||||
#include FREERTOS_KERNEL_SEMPHR_HEADER
|
||||
#include FREERTOS_KERNEL_CROUTINE_HEADER
|
||||
#include FREERTOS_KERNEL_LIST_HEADER
|
||||
#include FREERTOS_KERNEL_EVENT_GROUPS_HEADER
|
||||
|
||||
|
||||
int main()
|
||||
extern "C" void vApplicationStackOverflowHook( TaskHandle_t xTask,char * pcTaskName );
|
||||
void vApplicationStackOverflowHook( TaskHandle_t xTask,char * pcTaskName )
|
||||
{
|
||||
hshell_printf(NULL,"%s StackOverflow!\r\n",pcTaskName);
|
||||
while(true);
|
||||
}
|
||||
|
||||
extern "C" void vApplicationIdleHook( void );
|
||||
void vApplicationIdleHook( void )
|
||||
{
|
||||
if(hwatchdog_is_valid())
|
||||
{
|
||||
HWATCHDOG_FEED();
|
||||
}
|
||||
else
|
||||
{
|
||||
hruntime_loop_enable_softwatchdog(false);
|
||||
}
|
||||
}
|
||||
|
||||
void main_task(void *arg)
|
||||
{
|
||||
|
||||
hshell_printf(NULL,"main enter!\r\n");
|
||||
|
||||
hruntime_init_lowlevel();
|
||||
hshell_printf(NULL,"main task enter!\r\n");
|
||||
|
||||
hruntime_init();
|
||||
|
||||
while(true)
|
||||
{
|
||||
hruntime_loop();
|
||||
vTaskDelay(1);
|
||||
}
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
|
||||
hshell_printf(NULL,"main enter!\r\n");
|
||||
hruntime_init_lowlevel();
|
||||
|
||||
xTaskCreate( main_task, "main_task",4096, NULL, 2, NULL );
|
||||
|
||||
vTaskStartScheduler();
|
||||
|
||||
hshell_printf(NULL,"main leave!\r\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void print_blank(size_t n)
|
||||
{
|
||||
while(n--)
|
||||
@@ -148,6 +191,15 @@ static void print_fdt(const void *fdt,int offset,int depth)
|
||||
}
|
||||
}
|
||||
|
||||
static void shell_task(void *arg)
|
||||
{
|
||||
while(true)
|
||||
{
|
||||
while(EOF!=hshell_loop(NULL));
|
||||
vTaskDelay(1);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* 主初始化
|
||||
*/
|
||||
@@ -178,6 +230,9 @@ void main_init(const hruntime_function_t *func)
|
||||
hshell_printf(NULL,"Heap:start=%p,end=%p\r\n",__heap_start,__heap_end);
|
||||
}
|
||||
hshell_printf(NULL,"HBox Init(tick=%llu)!\r\n",(unsigned long long)hdefaults_tick_get());
|
||||
|
||||
xTaskCreate( shell_task, "shell_task",4096, NULL, 1, NULL );
|
||||
|
||||
}
|
||||
HRUNTIME_INIT_EXPORT(main,255,main_init,NULL);
|
||||
HRUNTIME_SYMBOL_EXPORT(main_init);
|
||||
@@ -187,7 +242,7 @@ HRUNTIME_SYMBOL_EXPORT(main_init);
|
||||
*/
|
||||
void main_loop(const hruntime_function_t *func)
|
||||
{
|
||||
while(EOF!=hshell_loop(NULL));
|
||||
|
||||
}
|
||||
HRUNTIME_LOOP_EXPORT(main,255,main_loop,NULL);
|
||||
HRUNTIME_SYMBOL_EXPORT(main_loop);
|
||||
|
||||
@@ -31,6 +31,7 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,unsigned long arg1,
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
void sbi_ecall_putc(char ch)
|
||||
{
|
||||
sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0,(uint8_t)ch, 0, 0, 0, 0, 0);
|
||||
@@ -64,45 +65,169 @@ size_t sbi_rdtime(void)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#if __riscv_xlen == 64
|
||||
#define opensbi_entry_save_context() \
|
||||
asm volatile (\
|
||||
"addi sp, sp, -8*32\n"\
|
||||
"sd x1, 1 * 8( sp )\n"\
|
||||
"sd x2, 2 * 8( sp )\n"\
|
||||
"sd x3, 3 * 8( sp )\n"\
|
||||
"sd x4, 4 * 8( sp )\n"\
|
||||
"sd x5, 5 * 8( sp )\n"\
|
||||
"sd x6, 6 * 8( sp )\n"\
|
||||
"sd x7, 7 * 8( sp )\n"\
|
||||
"sd x8, 8 * 8( sp )\n"\
|
||||
"sd x9, 9 * 8( sp )\n"\
|
||||
"sd x10, 10 * 8( sp )\n"\
|
||||
"sd x11, 11 * 8( sp )\n"\
|
||||
"sd x12, 12 * 8( sp )\n"\
|
||||
"sd x13, 13 * 8( sp )\n"\
|
||||
"sd x14, 14 * 8( sp )\n"\
|
||||
"sd x15, 15 * 8( sp )\n"\
|
||||
"sd x16, 16 * 8( sp )\n"\
|
||||
"sd x17, 17 * 8( sp )\n"\
|
||||
"sd x18, 18 * 8( sp )\n"\
|
||||
"sd x19, 19 * 8( sp )\n"\
|
||||
"sd x20, 20 * 8( sp )\n"\
|
||||
"sd x21, 21 * 8( sp )\n"\
|
||||
"sd x22, 22 * 8( sp )\n"\
|
||||
"sd x23, 23 * 8( sp )\n"\
|
||||
"sd x24, 24 * 8( sp )\n"\
|
||||
"sd x25, 25 * 8( sp )\n"\
|
||||
"sd x26, 26 * 8( sp )\n"\
|
||||
"sd x27, 27 * 8( sp )\n"\
|
||||
"sd x28, 28 * 8( sp )\n"\
|
||||
"sd x29, 29 * 8( sp )\n"\
|
||||
"sd x30, 30 * 8( sp )\n"\
|
||||
"sd x31, 31 * 8( sp )\n"\
|
||||
:::)
|
||||
#define opensbi_entry_restore_context() \
|
||||
asm volatile (\
|
||||
"ld x1, 1 * 8( sp )\n"\
|
||||
"ld x2, 2 * 8( sp )\n"\
|
||||
"ld x3, 3 * 8( sp )\n"\
|
||||
"ld x4, 4 * 8( sp )\n"\
|
||||
"ld x5, 5 * 8( sp )\n"\
|
||||
"ld x6, 6 * 8( sp )\n"\
|
||||
"ld x7, 7 * 8( sp )\n"\
|
||||
"ld x8, 8 * 8( sp )\n"\
|
||||
"ld x9, 9 * 8( sp )\n"\
|
||||
"ld x10, 10 * 8( sp )\n"\
|
||||
"ld x11, 11 * 8( sp )\n"\
|
||||
"ld x12, 12 * 8( sp )\n"\
|
||||
"ld x13, 13 * 8( sp )\n"\
|
||||
"ld x14, 14 * 8( sp )\n"\
|
||||
"ld x15, 15 * 8( sp )\n"\
|
||||
"ld x16, 16 * 8( sp )\n"\
|
||||
"ld x17, 17 * 8( sp )\n"\
|
||||
"ld x18, 18 * 8( sp )\n"\
|
||||
"ld x19, 19 * 8( sp )\n"\
|
||||
"ld x20, 20 * 8( sp )\n"\
|
||||
"ld x21, 21 * 8( sp )\n"\
|
||||
"ld x22, 22 * 8( sp )\n"\
|
||||
"ld x23, 23 * 8( sp )\n"\
|
||||
"ld x24, 24 * 8( sp )\n"\
|
||||
"ld x25, 25 * 8( sp )\n"\
|
||||
"ld x26, 26 * 8( sp )\n"\
|
||||
"ld x27, 27 * 8( sp )\n"\
|
||||
"ld x28, 28 * 8( sp )\n"\
|
||||
"ld x29, 29 * 8( sp )\n"\
|
||||
"ld x30, 30 * 8( sp )\n"\
|
||||
"ld x31, 31 * 8( sp )\n"\
|
||||
"addi sp, sp, 8*32\n"\
|
||||
:::)
|
||||
#else
|
||||
#define opensbi_entry_save_context() \
|
||||
asm volatile (\
|
||||
"addi sp, sp, -4*32\n"\
|
||||
"sw x1, 1 * 4( sp )\n"\
|
||||
"sw x2, 2 * 4( sp )\n"\
|
||||
"sw x3, 3 * 4( sp )\n"\
|
||||
"sw x4, 4 * 4( sp )\n"\
|
||||
"sw x5, 5 * 4( sp )\n"\
|
||||
"sw x6, 6 * 4( sp )\n"\
|
||||
"sw x7, 7 * 4( sp )\n"\
|
||||
"sw x8, 8 * 4( sp )\n"\
|
||||
"sw x9, 9 * 4( sp )\n"\
|
||||
"sw x10, 10 * 4( sp )\n"\
|
||||
"sw x11, 11 * 4( sp )\n"\
|
||||
"sw x12, 12 * 4( sp )\n"\
|
||||
"sw x13, 13 * 4( sp )\n"\
|
||||
"sw x14, 14 * 4( sp )\n"\
|
||||
"sw x15, 15 * 4( sp )\n"\
|
||||
"sw x16, 16 * 4( sp )\n"\
|
||||
"sw x17, 17 * 4( sp )\n"\
|
||||
"sw x18, 18 * 4( sp )\n"\
|
||||
"sw x19, 19 * 4( sp )\n"\
|
||||
"sw x20, 20 * 4( sp )\n"\
|
||||
"sw x21, 21 * 4( sp )\n"\
|
||||
"sw x22, 22 * 4( sp )\n"\
|
||||
"sw x23, 23 * 4( sp )\n"\
|
||||
"sw x24, 24 * 4( sp )\n"\
|
||||
"sw x25, 25 * 4( sp )\n"\
|
||||
"sw x26, 26 * 4( sp )\n"\
|
||||
"sw x27, 27 * 4( sp )\n"\
|
||||
"sw x28, 28 * 4( sp )\n"\
|
||||
"sw x29, 29 * 4( sp )\n"\
|
||||
"sw x30, 30 * 4( sp )\n"\
|
||||
"sw x31, 31 * 4( sp )\n"\
|
||||
:::)
|
||||
#define opensbi_entry_restore_context() \
|
||||
asm volatile (\
|
||||
"lw x1, 1 * 4( sp )\n"\
|
||||
"lw x2, 2 * 4( sp )\n"\
|
||||
"lw x3, 3 * 4( sp )\n"\
|
||||
"lw x4, 4 * 4( sp )\n"\
|
||||
"lw x5, 5 * 4( sp )\n"\
|
||||
"lw x6, 6 * 4( sp )\n"\
|
||||
"lw x7, 7 * 4( sp )\n"\
|
||||
"lw x8, 8 * 4( sp )\n"\
|
||||
"lw x9, 9 * 4( sp )\n"\
|
||||
"lw x10, 10 * 4( sp )\n"\
|
||||
"lw x11, 11 * 4( sp )\n"\
|
||||
"lw x12, 12 * 4( sp )\n"\
|
||||
"lw x13, 13 * 4( sp )\n"\
|
||||
"lw x14, 14 * 4( sp )\n"\
|
||||
"lw x15, 15 * 4( sp )\n"\
|
||||
"lw x16, 16 * 4( sp )\n"\
|
||||
"lw x17, 17 * 4( sp )\n"\
|
||||
"lw x18, 18 * 4( sp )\n"\
|
||||
"lw x19, 19 * 4( sp )\n"\
|
||||
"lw x20, 20 * 4( sp )\n"\
|
||||
"lw x21, 21 * 4( sp )\n"\
|
||||
"lw x22, 22 * 4( sp )\n"\
|
||||
"lw x23, 23 * 4( sp )\n"\
|
||||
"lw x24, 24 * 4( sp )\n"\
|
||||
"lw x25, 25 * 4( sp )\n"\
|
||||
"lw x26, 26 * 4( sp )\n"\
|
||||
"lw x27, 27 * 4( sp )\n"\
|
||||
"lw x28, 28 * 4( sp )\n"\
|
||||
"lw x29, 29 * 4( sp )\n"\
|
||||
"lw x30, 30 * 4( sp )\n"\
|
||||
"lw x31, 31 * 4( sp )\n"\
|
||||
"addi sp, sp, 4*32\n"\
|
||||
:::)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* opensbi的入口，放在首地址
|
||||
*/
|
||||
__SECTION(".vector") __attribute__((naked)) void opensbi_entry(uintptr_t a0, uintptr_t a1) ;
|
||||
__SECTION(".vector") __attribute__((naked)) void opensbi_entry() ;
|
||||
__SECTION(".vector") __attribute__((naked)) void opensbi_tray_entry() ;
|
||||
__NO_INIT sbi_entry_para_t sbi_entry_para_data;
|
||||
void _start();
|
||||
void opensbi_entry(uintptr_t a0, uintptr_t a1)
|
||||
void opensbi_entry()
|
||||
{
|
||||
|
||||
/*
|
||||
* 保存入口参数
|
||||
*/
|
||||
{
|
||||
/*
|
||||
* 此入口同时也是S-mode下的陷入(trap)地址（opensbi默认会设置为直接模式）
|
||||
*/
|
||||
size_t scause=0;
|
||||
size_t stval=0;
|
||||
asm volatile ("csrr %0,scause":"+r"(scause)::"memory");
|
||||
asm volatile ("csrr %0,stval":"+r"(stval)::"memory");
|
||||
if(scause!=0 || (scause==0 && stval!=0))
|
||||
{
|
||||
if(scause > (1ULL << (8*sizeof(size_t)-1)))
|
||||
{
|
||||
//中断
|
||||
}
|
||||
else
|
||||
{
|
||||
//异常
|
||||
char code[256]={0};
|
||||
itoa(scause,code,10);
|
||||
sbi_ecall_console_puts("exception=");
|
||||
sbi_ecall_console_puts(code);
|
||||
sbi_ecall_console_puts("\r\n");
|
||||
while(true);
|
||||
}
|
||||
/*
|
||||
* 采用sret返回
|
||||
*/
|
||||
asm volatile ("sret");
|
||||
}
|
||||
|
||||
register size_t a0 asm ("a0");
|
||||
register size_t a1 asm ("a1");
|
||||
sbi_entry_para_data.a0=a0;
|
||||
sbi_entry_para_data.a1=a1;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -111,15 +236,15 @@ void opensbi_entry(uintptr_t a0, uintptr_t a1)
|
||||
asm volatile ("la sp,__stack");
|
||||
|
||||
/*
|
||||
*
|
||||
* 设置stvec
|
||||
*/
|
||||
asm volatile ("csrw stvec,%0"::"r"(&opensbi_tray_entry));
|
||||
|
||||
/*
|
||||
* 进入入口`
|
||||
*/
|
||||
sbi_ecall_console_puts("firmware entry enter!\r\n");
|
||||
|
||||
/*
|
||||
* 保存入口参数
|
||||
*/
|
||||
sbi_entry_para_data.a0=a0;
|
||||
sbi_entry_para_data.a1=a1;
|
||||
|
||||
/*
|
||||
* 启动C语言入口
|
||||
@@ -132,4 +257,109 @@ void opensbi_entry(uintptr_t a0, uintptr_t a1)
|
||||
sbi_ecall_console_puts("firmware entry leave!\r\n");
|
||||
}
|
||||
|
||||
void opensbi_tray_entry()
|
||||
{
|
||||
/*
|
||||
* 保存上下文
|
||||
*/
|
||||
opensbi_entry_save_context();
|
||||
{
|
||||
size_t scause=0;
|
||||
size_t stval=0;
|
||||
size_t sepc=0;
|
||||
size_t sstatus=0;
|
||||
asm volatile ("csrr %0,scause":"+r"(scause)::"memory");
|
||||
asm volatile ("csrr %0,stval":"+r"(stval)::"memory");
|
||||
asm volatile ("csrr %0,sepc":"+r"(sepc)::"memory");
|
||||
asm volatile ("csrr %0,sstatus":"+r"(sstatus)::"memory");
|
||||
if(scause!=0 || (scause==0 && stval!=0))
|
||||
{
|
||||
if(scause > (1ULL << (8*sizeof(size_t)-1)))
|
||||
{
|
||||
/*
|
||||
* 处理中断
|
||||
*/
|
||||
switch(scause&0xFFFF)
|
||||
{
|
||||
case 1:
|
||||
{
|
||||
/*
|
||||
* 恢复上下文并跳转至freertos中断处理函数,采用软件中断切换任务(原版采用ecall指令)
|
||||
*/
|
||||
opensbi_entry_restore_context();
|
||||
asm volatile("j freertos_risc_v_software_interrupt_handler");
|
||||
}
|
||||
break;
|
||||
case 5:
|
||||
{
|
||||
/*
|
||||
* 恢复上下文并跳转至freertos中断处理函数
|
||||
*/
|
||||
opensbi_entry_restore_context();
|
||||
asm volatile("j freertos_risc_v_mtimer_interrupt_handler");
|
||||
}
|
||||
break;
|
||||
default:
|
||||
{
|
||||
/*
|
||||
* 恢复上下文并跳转至freertos中断处理函数
|
||||
*/
|
||||
opensbi_entry_restore_context();
|
||||
asm volatile("j freertos_risc_v_interrupt_handler");
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
//异常
|
||||
char val[256]= {0};
|
||||
itoa(scause,val,10);
|
||||
sbi_ecall_console_puts("exception=");
|
||||
sbi_ecall_console_puts(val);
|
||||
itoa(sepc,val,16);
|
||||
sbi_ecall_console_puts(",sepc=");
|
||||
sbi_ecall_console_puts(val);
|
||||
itoa(sstatus,val,16);
|
||||
sbi_ecall_console_puts(",status=");
|
||||
sbi_ecall_console_puts(val);
|
||||
sbi_ecall_console_puts("\r\n");
|
||||
while(true);
|
||||
}
|
||||
/*
|
||||
* 恢复上下文并采用sret返回
|
||||
*/
|
||||
opensbi_entry_restore_context();
|
||||
asm volatile ("sret");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* 恢复上下文
|
||||
*/
|
||||
opensbi_entry_restore_context();
|
||||
asm volatile ("sret");
|
||||
}
|
||||
|
||||
extern void vPortSetupTimerInterrupt( void );
|
||||
extern const size_t uxTimerIncrementsForOneTick;
|
||||
void vPortSetupTimerInterrupt( void )
|
||||
{
|
||||
uint64_t ullNextTime=sbi_rdtime()+uxTimerIncrementsForOneTick;
|
||||
asm volatile ( "csrs sie, %0" ::"r" ( 0x22 ) :"memory"); //打开定时中断与软件中断
|
||||
asm volatile ( "csrs sstatus, %0" ::"r" ( 0x2 ) :"memory");//打开SIE
|
||||
#if (__riscv_xlen) == 32
|
||||
{
|
||||
size_t reg_val=0;
|
||||
asm volatile ( "csrr %0,stimecmph":"+r"(reg_val)::"memory");
|
||||
reg_val=(ullNextTime>>32);
|
||||
asm volatile ( "csrw stimecmph,%0"::"r"(reg_val):"memory");
|
||||
}
|
||||
#endif
|
||||
{
|
||||
size_t reg_val=0;
|
||||
asm volatile ( "csrr %0,stimecmp":"+r"(reg_val)::"memory");
|
||||
reg_val=ullNextTime;
|
||||
asm volatile ( "csrw stimecmp,%0"::"r"(reg_val):"memory");
|
||||
}
|
||||
}
|
||||
|
||||
175
hbox/hsimulator/risc-v/rom/opensbi/port.c
Normal file
175
hbox/hsimulator/risc-v/rom/opensbi/port.c
Normal file
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the RISC-V port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#include "hbox.h"
|
||||
/* Scheduler includes. */
|
||||
#include FREERTOS_KERNEL_FREERTOS_HEADER
|
||||
#include FREERTOS_KERNEL_TASK_HEADER
|
||||
#include "portmacro.h"
|
||||
|
||||
/* Standard includes. */
|
||||
#include "string.h"
|
||||
|
||||
#ifdef configCLINT_BASE_ADDRESS
|
||||
#warning "The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS directly in place of configCLINT_BASE_ADDRESS. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
|
||||
#endif
|
||||
|
||||
#ifndef configMTIME_BASE_ADDRESS
|
||||
#warning "configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
|
||||
#endif
|
||||
|
||||
#ifndef configMTIMECMP_BASE_ADDRESS
|
||||
#warning "configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
|
||||
#endif
|
||||
|
||||
/* Let the user override the pre-loading of the initial RA. */
|
||||
#ifdef configTASK_RETURN_ADDRESS
|
||||
#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
|
||||
#else
|
||||
#define portTASK_RETURN_ADDRESS 0
|
||||
#endif
|
||||
|
||||
/* The stack used by interrupt service routines. Set configISR_STACK_SIZE_WORDS
|
||||
* to use a statically allocated array as the interrupt stack. Alternative leave
|
||||
* configISR_STACK_SIZE_WORDS undefined and update the linker script so that a
|
||||
* linker variable names __freertos_irq_stack_top has the same value as the top
|
||||
* of the stack used by main. Using the linker script method will repurpose the
|
||||
* stack that was used by main before the scheduler was started for use as the
|
||||
* interrupt stack after the scheduler has started. */
|
||||
#ifdef configISR_STACK_SIZE_WORDS
|
||||
static __attribute__( ( aligned( 16 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
|
||||
const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
|
||||
|
||||
/* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
|
||||
* the task stacks, and so will legitimately appear in many positions within
|
||||
* the ISR stack. */
|
||||
#define portISR_STACK_FILL_BYTE 0xee
|
||||
#else
|
||||
extern const uint32_t __freertos_irq_stack_top[];
|
||||
const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup the timer to generate the tick interrupts. The implementation in this
|
||||
* file is weak to allow application writers to change the timer used to
|
||||
* generate the tick interrupt.
|
||||
*/
|
||||
void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Used to program the machine timer compare register. */
|
||||
const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
|
||||
|
||||
/* Holds the critical nesting value - deliberately non-zero at start up to
|
||||
* ensure interrupts are not accidentally enabled before the scheduler starts. */
|
||||
size_t xCriticalNesting = ( size_t ) 0xaaaaaaaa;
|
||||
size_t * pxCriticalNesting = &xCriticalNesting;
|
||||
|
||||
/* Used to catch tasks that attempt to return from their implementing function. */
|
||||
size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
|
||||
|
||||
/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
|
||||
* stack checking. A problem in the ISR stack will trigger an assert, not call
|
||||
* the stack overflow hook function (because the stack overflow hook is specific
|
||||
* to a task stack, not the ISR stack). */
|
||||
#if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 )
|
||||
#warning "This path not tested, or even compiled yet."
|
||||
|
||||
static const uint8_t ucExpectedStackBytes[] =
|
||||
{
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
|
||||
portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE
|
||||
};
|
||||
\
|
||||
|
||||
#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
|
||||
#else /* if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
|
||||
/* Define the function away. */
|
||||
#define portCHECK_ISR_STACK()
|
||||
#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void xPortStartFirstTask( void );
|
||||
|
||||
#if ( configASSERT_DEFINED == 1 )
|
||||
{
|
||||
/* Check alignment of the interrupt stack - which is the same as the
|
||||
* stack that was being used by main() prior to the scheduler being
|
||||
* started. */
|
||||
configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
|
||||
|
||||
#ifdef configISR_STACK_SIZE_WORDS
|
||||
{
|
||||
memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
|
||||
}
|
||||
#endif /* configISR_STACK_SIZE_WORDS */
|
||||
}
|
||||
#endif /* configASSERT_DEFINED */
|
||||
|
||||
/* If there is a CLINT then it is ok to use the default implementation
|
||||
* in this file, otherwise vPortSetupTimerInterrupt() must be implemented to
|
||||
* configure whichever clock is to be used to generate the tick interrupt. */
|
||||
vPortSetupTimerInterrupt();
|
||||
|
||||
|
||||
#if ( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
|
||||
{
|
||||
/* Enable mtime and external interrupts. 1<<7 for timer interrupt,
|
||||
* 1<<11 for external interrupt. _RB_ What happens here when mtime is
|
||||
* not present as with pulpino? */
|
||||
__asm volatile ( "csrs mie, %0" ::"r" ( 0x880 ) );
|
||||
}
|
||||
#endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
|
||||
|
||||
xPortStartFirstTask();
|
||||
|
||||
/* Should not get here as after calling xPortStartFirstTask() only tasks
|
||||
* should be executing. */
|
||||
return pdFAIL;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented. */
|
||||
for( ; ; )
|
||||
{
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
411
hbox/hsimulator/risc-v/rom/opensbi/portASM.S
Normal file
411
hbox/hsimulator/risc-v/rom/opensbi/portASM.S
Normal file
@@ -0,0 +1,411 @@
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* The FreeRTOS kernel's RISC-V port is split between the the code that is
|
||||
* common across all currently supported RISC-V chips (implementations of the
|
||||
* RISC-V ISA), and code which tailors the port to a specific RISC-V chip:
|
||||
*
|
||||
* + The code that is common to all RISC-V chips is implemented in
|
||||
* FreeRTOS\Source\portable\GCC\RISC-V\portASM.S. There is only one
|
||||
* portASM.S file because the same file is used no matter which RISC-V chip is
|
||||
* in use.
|
||||
*
|
||||
* + The code that tailors the kernel's RISC-V port to a specific RISC-V
|
||||
* chip is implemented in freertos_risc_v_chip_specific_extensions.h. There
|
||||
* is one freertos_risc_v_chip_specific_extensions.h that can be used with any
|
||||
* RISC-V chip that both includes a standard CLINT and does not add to the
|
||||
* base set of RISC-V registers. There are additional
|
||||
* freertos_risc_v_chip_specific_extensions.h files for RISC-V implementations
|
||||
* that do not include a standard CLINT or do add to the base set of RISC-V
|
||||
* registers.
|
||||
*
|
||||
* CARE MUST BE TAKEN TO INCLDUE THE CORRECT
|
||||
* freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP
|
||||
* IN USE. To include the correct freertos_risc_v_chip_specific_extensions.h
|
||||
* header file ensure the path to the correct header file is in the assembler's
|
||||
* include path.
|
||||
*
|
||||
* This freertos_risc_v_chip_specific_extensions.h is for use on RISC-V chips
|
||||
* that include a standard CLINT and do not add to the base set of RISC-V
|
||||
* registers.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "portContext.h"
|
||||
|
||||
/* Check the freertos_risc_v_chip_specific_extensions.h and/or command line
|
||||
definitions. */
|
||||
#if defined( portasmHAS_CLINT ) && defined( portasmHAS_MTIME )
|
||||
#error The portasmHAS_CLINT constant has been deprecated. Please replace it with portasmHAS_MTIME. portasmHAS_CLINT and portasmHAS_MTIME cannot both be defined at once. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
|
||||
#endif
|
||||
|
||||
#ifdef portasmHAS_CLINT
|
||||
#warning The portasmHAS_CLINT constant has been deprecated. Please replace it with portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT. For now portasmHAS_MTIME and portasmHAS_SIFIVE_CLINT are derived from portasmHAS_CLINT. See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
|
||||
#define portasmHAS_MTIME portasmHAS_CLINT
|
||||
#define portasmHAS_SIFIVE_CLINT portasmHAS_CLINT
|
||||
#endif
|
||||
|
||||
#ifndef portasmHAS_MTIME
|
||||
#error freertos_risc_v_chip_specific_extensions.h must define portasmHAS_MTIME to either 1 (MTIME clock present) or 0 (MTIME clock not present). See https://www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html
|
||||
#endif
|
||||
|
||||
#ifndef portasmHAS_SIFIVE_CLINT
|
||||
#define portasmHAS_SIFIVE_CLINT 0
|
||||
#endif
|
||||
|
||||
.global xPortStartFirstTask
|
||||
.global pxPortInitialiseStack
|
||||
.global freertos_risc_v_trap_handler
|
||||
.global freertos_risc_v_exception_handler
|
||||
.global freertos_risc_v_interrupt_handler
|
||||
.global freertos_risc_v_mtimer_interrupt_handler
|
||||
.global freertos_risc_v_software_interrupt_handler
|
||||
|
||||
.extern vTaskSwitchContext
|
||||
.extern xTaskIncrementTick
|
||||
.extern vPortUpdateTimerCmp
|
||||
.extern pullMachineTimerCompareRegister
|
||||
.extern pullNextTime
|
||||
.extern uxTimerIncrementsForOneTick /* size_t type so 32-bit on 32-bit core and 64-bits on 64-bit core. */
|
||||
.extern xTaskReturnAddress
|
||||
|
||||
.weak freertos_risc_v_application_exception_handler
|
||||
.weak freertos_risc_v_application_interrupt_handler
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portUPDATE_MTIMER_COMPARE_REGISTER
|
||||
|
||||
#if( __riscv_xlen == 32 )
|
||||
|
||||
/* Update the 64-bit mtimer compare match value in two 32-bit writes. */
|
||||
li a4, -1
|
||||
csrr a2, stimecmp /* Load the low word of stimecmp into a2. */
|
||||
csrr a3, stimecmph /* Load the high word of stimecmp into a3. */
|
||||
csrw stimecmp,a4 /* Low word no smaller than old value to start with - will be overwritten below. */
|
||||
csrw stimecmph,a3 /* Store high word of stimecmp into compare register. No smaller than new value. */
|
||||
csrw stimecmp,a2 /* Store low word of stimecmp into compare register. */
|
||||
lw t0, uxTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pstimecmp?). */
|
||||
add a4, t0, a2 /* Add the low word of stimecmp to the timer increments for one tick (assumes timer increment for one tick fits in 32-bits). */
|
||||
sltu t1, a4, a2 /* See if the sum of low words overflowed (what about the zero case?). */
|
||||
add t2, a3, t1 /* Add overflow to high word of stimecmp. */
|
||||
csrw stimecmp,a4 /* Store new low word of stimecmp. */
|
||||
csrw stimecmph,a3 /* Store new high word of stimecmp. */
|
||||
#endif /* __riscv_xlen == 32 */
|
||||
|
||||
#if( __riscv_xlen == 64 )
|
||||
|
||||
/* Update the 64-bit mtimer compare match value. */
|
||||
csrr t2, stimecmp /* Load stimecmp into t2. */
|
||||
csrw stimecmp, t2 /* Store stimecmp into compare register. */
|
||||
ld t0, uxTimerIncrementsForOneTick /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pstimecmp?). */
|
||||
add t4, t0, t2 /* Add stimecmp to the timer increments for one tick. */
|
||||
csrw stimecmp, t4 /* Store stimecmp. */
|
||||
|
||||
#endif /* __riscv_xlen == 64 */
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Unlike other ports pxPortInitialiseStack() is written in assembly code as it
|
||||
* needs access to the portasmADDITIONAL_CONTEXT_SIZE constant. The prototype
|
||||
* for the function is as per the other ports:
|
||||
* StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters );
|
||||
*
|
||||
* As per the standard RISC-V ABI pxTopOfStack is passed in in a0, pxCode in
|
||||
* a1, and pvParameters in a2. The new top of stack is passed out in a0.
|
||||
*
|
||||
* RISC-V maps registers to ABI names as follows (X1 to X31 integer registers
|
||||
* for the 'I' profile, X1 to X15 for the 'E' profile, currently I assumed).
|
||||
*
|
||||
* Register ABI Name Description Saver
|
||||
* x0 zero Hard-wired zero -
|
||||
* x1 ra Return address Caller
|
||||
* x2 sp Stack pointer Callee
|
||||
* x3 gp Global pointer -
|
||||
* x4 tp Thread pointer -
|
||||
* x5-7 t0-2 Temporaries Caller
|
||||
* x8 s0/fp Saved register/Frame pointer Callee
|
||||
* x9 s1 Saved register Callee
|
||||
* x10-11 a0-1 Function Arguments/return values Caller
|
||||
* x12-17 a2-7 Function arguments Caller
|
||||
* x18-27 s2-11 Saved registers Callee
|
||||
* x28-31 t3-6 Temporaries Caller
|
||||
*
|
||||
* The RISC-V context is saved to FreeRTOS tasks in the following stack frame,
|
||||
* where the global and thread pointers are currently assumed to be constant so
|
||||
* are not saved:
|
||||
*
|
||||
* xCriticalNesting
|
||||
* x31
|
||||
* x30
|
||||
* x29
|
||||
* x28
|
||||
* x27
|
||||
* x26
|
||||
* x25
|
||||
* x24
|
||||
* x23
|
||||
* x22
|
||||
* x21
|
||||
* x20
|
||||
* x19
|
||||
* x18
|
||||
* x17
|
||||
* x16
|
||||
* x15
|
||||
* x14
|
||||
* x13
|
||||
* x12
|
||||
* x11
|
||||
* pvParameters
|
||||
* x9
|
||||
* x8
|
||||
* x7
|
||||
* x6
|
||||
* x5
|
||||
* portTASK_RETURN_ADDRESS
|
||||
* [FPU registers (when enabled/available) go here]
|
||||
* [VPU registers (when enabled/available) go here]
|
||||
* [chip specific registers go here]
|
||||
* sstatus
|
||||
* pxCode
|
||||
*/
|
||||
pxPortInitialiseStack:
|
||||
addi a0, a0, -portWORD_SIZE /* Space for critical nesting count. */
|
||||
store_x x0, 0(a0) /* Critical nesting count starts at 0 for every task. */
|
||||
|
||||
#ifdef __riscv_32e
|
||||
addi a0, a0, -(6 * portWORD_SIZE) /* Space for registers x10-x15. */
|
||||
#else
|
||||
addi a0, a0, -(22 * portWORD_SIZE) /* Space for registers x10-x31. */
|
||||
#endif
|
||||
store_x a2, 0(a0) /* Task parameters (pvParameters parameter) goes into register x10/a0 on the stack. */
|
||||
|
||||
addi a0, a0, -(6 * portWORD_SIZE) /* Space for registers x5-x9 + taskReturnAddress (register x1). */
|
||||
load_x t0, xTaskReturnAddress
|
||||
store_x t0, 0(a0) /* Return address onto the stack. */
|
||||
|
||||
addi t0, x0, portasmADDITIONAL_CONTEXT_SIZE /* The number of chip specific additional registers. */
|
||||
chip_specific_stack_frame: /* First add any chip specific registers to the stack frame being created. */
|
||||
beq t0, x0, 1f /* No more chip specific registers to save. */
|
||||
addi a0, a0, -portWORD_SIZE /* Make space for chip specific register. */
|
||||
store_x x0, 0(a0) /* Give the chip specific register an initial value of zero. */
|
||||
addi t0, t0, -1 /* Decrement the count of chip specific registers remaining. */
|
||||
j chip_specific_stack_frame /* Until no more chip specific registers. */
|
||||
1:
|
||||
csrr t0, sstatus /* Obtain current sstatus value. */
|
||||
andi t0, t0, ~0x2 /* Ensure interrupts are disabled when the stack is restored within an ISR. Required when a task is created after the scheduler has been started, otherwise interrupts would be disabled anyway. */
|
||||
addi t1, x0, 0x012 /* Generate the value 0x0120, which are the SPIE=1 and SPP=1 in sstatus. */
|
||||
slli t1, t1, 4
|
||||
or t0, t0, t1 /* Set SPIE in sstatus value. */
|
||||
|
||||
#if( configENABLE_FPU == 1 )
|
||||
/* Mark the FPU as clean in the sstatus value. */
|
||||
li t1, ~MSTATUS_FS_MASK
|
||||
and t0, t0, t1
|
||||
li t1, MSTATUS_FS_CLEAN
|
||||
or t0, t0, t1
|
||||
#endif
|
||||
|
||||
#if( configENABLE_VPU == 1 )
|
||||
/* Mark the VPU as clean in the sstatus value. */
|
||||
li t1, ~MSTATUS_VS_MASK
|
||||
and t0, t0, t1
|
||||
li t1, MSTATUS_VS_CLEAN
|
||||
or t0, t0, t1
|
||||
#endif
|
||||
|
||||
addi a0, a0, -portWORD_SIZE
|
||||
store_x t0, 0(a0) /* sstatus onto the stack. */
|
||||
|
||||
addi a0, a0, -portWORD_SIZE
|
||||
store_x a1, 0(a0) /* mret value (pxCode parameter) onto the stack. */
|
||||
ret
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
xPortStartFirstTask:
|
||||
load_x sp, pxCurrentTCB /* Load pxCurrentTCB. */
|
||||
load_x sp, 0( sp ) /* Read sp from first TCB member. */
|
||||
|
||||
load_x x1, 0( sp ) /* Note for starting the scheduler the exception return address is used as the function return address. */
|
||||
|
||||
load_x x5, 1 * portWORD_SIZE( sp ) /* Initial sstatus into x5 (t0). */
|
||||
addi x5, x5, 0x02 /* Set SIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */
|
||||
csrw sstatus, x5 /* Interrupts enabled from here! */
|
||||
|
||||
portasmRESTORE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
|
||||
|
||||
load_x x7, 5 * portWORD_SIZE( sp ) /* t2 */
|
||||
load_x x8, 6 * portWORD_SIZE( sp ) /* s0/fp */
|
||||
load_x x9, 7 * portWORD_SIZE( sp ) /* s1 */
|
||||
load_x x10, 8 * portWORD_SIZE( sp ) /* a0 */
|
||||
load_x x11, 9 * portWORD_SIZE( sp ) /* a1 */
|
||||
load_x x12, 10 * portWORD_SIZE( sp ) /* a2 */
|
||||
load_x x13, 11 * portWORD_SIZE( sp ) /* a3 */
|
||||
load_x x14, 12 * portWORD_SIZE( sp ) /* a4 */
|
||||
load_x x15, 13 * portWORD_SIZE( sp ) /* a5 */
|
||||
#ifndef __riscv_32e
|
||||
load_x x16, 14 * portWORD_SIZE( sp ) /* a6 */
|
||||
load_x x17, 15 * portWORD_SIZE( sp ) /* a7 */
|
||||
load_x x18, 16 * portWORD_SIZE( sp ) /* s2 */
|
||||
load_x x19, 17 * portWORD_SIZE( sp ) /* s3 */
|
||||
load_x x20, 18 * portWORD_SIZE( sp ) /* s4 */
|
||||
load_x x21, 19 * portWORD_SIZE( sp ) /* s5 */
|
||||
load_x x22, 20 * portWORD_SIZE( sp ) /* s6 */
|
||||
load_x x23, 21 * portWORD_SIZE( sp ) /* s7 */
|
||||
load_x x24, 22 * portWORD_SIZE( sp ) /* s8 */
|
||||
load_x x25, 23 * portWORD_SIZE( sp ) /* s9 */
|
||||
load_x x26, 24 * portWORD_SIZE( sp ) /* s10 */
|
||||
load_x x27, 25 * portWORD_SIZE( sp ) /* s11 */
|
||||
load_x x28, 26 * portWORD_SIZE( sp ) /* t3 */
|
||||
load_x x29, 27 * portWORD_SIZE( sp ) /* t4 */
|
||||
load_x x30, 28 * portWORD_SIZE( sp ) /* t5 */
|
||||
load_x x31, 29 * portWORD_SIZE( sp ) /* t6 */
|
||||
#endif
|
||||
|
||||
load_x x5, portCRITICAL_NESTING_OFFSET * portWORD_SIZE( sp ) /* Obtain xCriticalNesting value for this task from task's stack. */
|
||||
load_x x6, pxCriticalNesting /* Load the address of xCriticalNesting into x6. */
|
||||
store_x x5, 0( x6 ) /* Restore the critical nesting value for this task. */
|
||||
|
||||
load_x x5, 3 * portWORD_SIZE( sp ) /* Initial x5 (t0) value. */
|
||||
load_x x6, 4 * portWORD_SIZE( sp ) /* Initial x6 (t1) value. */
|
||||
|
||||
addi sp, sp, portCONTEXT_SIZE
|
||||
ret
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
freertos_risc_v_application_exception_handler:
|
||||
csrr t0, scause /* For viewing in the debugger only. */
|
||||
csrr t1, sepc /* For viewing in the debugger only */
|
||||
csrr t2, sstatus /* For viewing in the debugger only */
|
||||
j .
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
freertos_risc_v_application_interrupt_handler:
|
||||
csrr t0, scause /* For viewing in the debugger only. */
|
||||
csrr t1, sepc /* For viewing in the debugger only */
|
||||
csrr t2, sstatus /* For viewing in the debugger only */
|
||||
j .
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.section .text.freertos_risc_v_exception_handler
|
||||
freertos_risc_v_exception_handler:
|
||||
portcontextSAVE_EXCEPTION_CONTEXT
|
||||
/* a0 now contains mcause. */
|
||||
li t0, 11 /* 11 == environment call. */
|
||||
bne a0, t0, other_exception /* Not an M environment call, so some other exception. */
|
||||
call vTaskSwitchContext
|
||||
portcontextRESTORE_CONTEXT
|
||||
|
||||
other_exception:
|
||||
call freertos_risc_v_application_exception_handler
|
||||
portcontextRESTORE_CONTEXT
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.section .text.freertos_risc_v_interrupt_handler
|
||||
freertos_risc_v_interrupt_handler:
|
||||
portcontextSAVE_INTERRUPT_CONTEXT
|
||||
call freertos_risc_v_application_interrupt_handler
|
||||
portcontextRESTORE_CONTEXT
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.section .text.freertos_risc_v_mtimer_interrupt_handler
|
||||
freertos_risc_v_mtimer_interrupt_handler:
|
||||
portcontextSAVE_INTERRUPT_CONTEXT
|
||||
portUPDATE_MTIMER_COMPARE_REGISTER
|
||||
call xTaskIncrementTick
|
||||
beqz a0, exit_without_context_switch /* Don't switch context if incrementing tick didn't unblock a task. */
|
||||
call vTaskSwitchContext
|
||||
exit_without_context_switch:
|
||||
portcontextRESTORE_CONTEXT
|
||||
|
||||
.section .text.freertos_risc_v_software_interrupt_handler
|
||||
freertos_risc_v_software_interrupt_handler:
|
||||
portcontextSAVE_INTERRUPT_CONTEXT
|
||||
csrc sip,0x02 /**< 清除软件中断 */
|
||||
call vTaskSwitchContext
|
||||
portcontextRESTORE_CONTEXT
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.section .text.freertos_risc_v_trap_handler
|
||||
.align 8
|
||||
freertos_risc_v_trap_handler:
|
||||
portcontextSAVE_CONTEXT_INTERNAL
|
||||
|
||||
csrr a0, scause
|
||||
csrr a1, sepc
|
||||
|
||||
bge a0, x0, synchronous_exception
|
||||
|
||||
asynchronous_interrupt:
|
||||
store_x a1, 0( sp ) /* Asynchronous interrupt so save unmodified exception return address. */
|
||||
load_x sp, xISRStackTop /* Switch to ISR stack. */
|
||||
j handle_interrupt
|
||||
|
||||
synchronous_exception:
|
||||
addi a1, a1, 4 /* Synchronous so update exception return address to the instruction after the instruction that generated the exeption. */
|
||||
store_x a1, 0( sp ) /* Save updated exception return address. */
|
||||
load_x sp, xISRStackTop /* Switch to ISR stack. */
|
||||
j handle_exception
|
||||
|
||||
handle_interrupt:
|
||||
#if( portasmHAS_MTIME != 0 )
|
||||
|
||||
test_if_mtimer: /* If there is a CLINT then the mtimer is used to generate the tick interrupt. */
|
||||
addi t0, x0, 1
|
||||
slli t0, t0, __riscv_xlen - 1 /* LSB is already set, shift into MSB. Shift 31 on 32-bit or 63 on 64-bit cores. */
|
||||
addi t1, t0, 7 /* 0x8000[]0007 == machine timer interrupt. */
|
||||
bne a0, t1, application_interrupt_handler
|
||||
|
||||
portUPDATE_MTIMER_COMPARE_REGISTER
|
||||
call xTaskIncrementTick
|
||||
beqz a0, processed_source /* Don't switch context if incrementing tick didn't unblock a task. */
|
||||
call vTaskSwitchContext
|
||||
j processed_source
|
||||
|
||||
#endif /* portasmHAS_MTIME */
|
||||
|
||||
application_interrupt_handler:
|
||||
call freertos_risc_v_application_interrupt_handler
|
||||
j processed_source
|
||||
|
||||
handle_exception:
|
||||
/* a0 contains mcause. */
|
||||
li t0, 11 /* 11 == environment call. */
|
||||
bne a0, t0, application_exception_handler /* Not an M environment call, so some other exception. */
|
||||
call vTaskSwitchContext
|
||||
j processed_source
|
||||
|
||||
application_exception_handler:
|
||||
call freertos_risc_v_application_exception_handler
|
||||
j processed_source /* No other exceptions handled yet. */
|
||||
|
||||
processed_source:
|
||||
portcontextRESTORE_CONTEXT
|
||||
/*-----------------------------------------------------------*/
|
||||
468
hbox/hsimulator/risc-v/rom/opensbi/portContext.h
Normal file
468
hbox/hsimulator/risc-v/rom/opensbi/portContext.h
Normal file
@@ -0,0 +1,468 @@
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PORTCONTEXT_H
|
||||
#define PORTCONTEXT_H
|
||||
|
||||
#ifndef configENABLE_FPU
|
||||
#define configENABLE_FPU 0
|
||||
#endif
|
||||
|
||||
#ifndef configENABLE_VPU
|
||||
#define configENABLE_VPU 0
|
||||
#endif
|
||||
|
||||
#if __riscv_xlen == 64
|
||||
#define portWORD_SIZE 8
|
||||
#define store_x sd
|
||||
#define load_x ld
|
||||
#elif __riscv_xlen == 32
|
||||
#define store_x sw
|
||||
#define load_x lw
|
||||
#define portWORD_SIZE 4
|
||||
#else
|
||||
#error Assembler did not define __riscv_xlen
|
||||
#endif
|
||||
|
||||
#include "freertos_risc_v_chip_specific_extensions.h"
|
||||
|
||||
/* Only the standard core registers are stored by default. Any additional
|
||||
* registers must be saved by the portasmSAVE_ADDITIONAL_REGISTERS and
|
||||
* portasmRESTORE_ADDITIONAL_REGISTERS macros - which can be defined in a chip
|
||||
* specific version of freertos_risc_v_chip_specific_extensions.h. See the
|
||||
* notes at the top of portASM.S file. */
|
||||
#ifdef __riscv_32e
|
||||
#define portCONTEXT_SIZE ( 15 * portWORD_SIZE )
|
||||
#define portCRITICAL_NESTING_OFFSET 14
|
||||
#else
|
||||
#define portCONTEXT_SIZE ( 31 * portWORD_SIZE )
|
||||
#define portCRITICAL_NESTING_OFFSET 30
|
||||
#endif
|
||||
|
||||
#if ( configENABLE_FPU == 1 )
|
||||
/* Bit [14:13] in the sstatus encode the status of FPU state which is one of
|
||||
* the following values:
|
||||
* 1. Value: 0, Meaning: Off.
|
||||
* 2. Value: 1, Meaning: Initial.
|
||||
* 3. Value: 2, Meaning: Clean.
|
||||
* 4. Value: 3, Meaning: Dirty.
|
||||
*/
|
||||
#define MSTATUS_FS_MASK 0x6000
|
||||
#define MSTATUS_FS_INITIAL 0x2000
|
||||
#define MSTATUS_FS_CLEAN 0x4000
|
||||
#define MSTATUS_FS_DIRTY 0x6000
|
||||
#define MSTATUS_FS_OFFSET 13
|
||||
|
||||
#ifdef __riscv_fdiv
|
||||
#if __riscv_flen == 32
|
||||
#define load_f flw
|
||||
#define store_f fsw
|
||||
#elif __riscv_flen == 64
|
||||
#define load_f fld
|
||||
#define store_f fsd
|
||||
#else
|
||||
#error Assembler did not define __riscv_flen
|
||||
#endif
|
||||
|
||||
#define portFPU_REG_SIZE ( __riscv_flen / 8 )
|
||||
#define portFPU_REG_COUNT 33 /* 32 Floating point registers plus one CSR. */
|
||||
#define portFPU_REG_OFFSET( regIndex ) ( ( 2 * portWORD_SIZE ) + ( regIndex * portFPU_REG_SIZE ) )
|
||||
#define portFPU_CONTEXT_SIZE ( portFPU_REG_SIZE * portFPU_REG_COUNT )
|
||||
#else
|
||||
#error configENABLE_FPU must not be set to 1 if the hardware does not have FPU
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if ( configENABLE_VPU == 1 )
|
||||
/* Bit [10:9] in the sstatus encode the status of VPU state which is one of
|
||||
* the following values:
|
||||
* 1. Value: 0, Meaning: Off.
|
||||
* 2. Value: 1, Meaning: Initial.
|
||||
* 3. Value: 2, Meaning: Clean.
|
||||
* 4. Value: 3, Meaning: Dirty.
|
||||
*/
|
||||
#define MSTATUS_VS_MASK 0x600
|
||||
#define MSTATUS_VS_INITIAL 0x200
|
||||
#define MSTATUS_VS_CLEAN 0x400
|
||||
#define MSTATUS_VS_DIRTY 0x600
|
||||
#define MSTATUS_VS_OFFSET 9
|
||||
|
||||
#ifndef __riscv_vector
|
||||
#error configENABLE_VPU must not be set to 1 if the hardware does not have VPU
|
||||
#endif
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.extern pxCurrentTCB
|
||||
.extern xISRStackTop
|
||||
.extern xCriticalNesting
|
||||
.extern pxCriticalNesting
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontexSAVE_FPU_CONTEXT
|
||||
addi sp, sp, -( portFPU_CONTEXT_SIZE )
|
||||
/* Store the FPU registers. */
|
||||
store_f f0, portFPU_REG_OFFSET( 0 )( sp )
|
||||
store_f f1, portFPU_REG_OFFSET( 1 )( sp )
|
||||
store_f f2, portFPU_REG_OFFSET( 2 )( sp )
|
||||
store_f f3, portFPU_REG_OFFSET( 3 )( sp )
|
||||
store_f f4, portFPU_REG_OFFSET( 4 )( sp )
|
||||
store_f f5, portFPU_REG_OFFSET( 5 )( sp )
|
||||
store_f f6, portFPU_REG_OFFSET( 6 )( sp )
|
||||
store_f f7, portFPU_REG_OFFSET( 7 )( sp )
|
||||
store_f f8, portFPU_REG_OFFSET( 8 )( sp )
|
||||
store_f f9, portFPU_REG_OFFSET( 9 )( sp )
|
||||
store_f f10, portFPU_REG_OFFSET( 10 )( sp )
|
||||
store_f f11, portFPU_REG_OFFSET( 11 )( sp )
|
||||
store_f f12, portFPU_REG_OFFSET( 12 )( sp )
|
||||
store_f f13, portFPU_REG_OFFSET( 13 )( sp )
|
||||
store_f f14, portFPU_REG_OFFSET( 14 )( sp )
|
||||
store_f f15, portFPU_REG_OFFSET( 15 )( sp )
|
||||
store_f f16, portFPU_REG_OFFSET( 16 )( sp )
|
||||
store_f f17, portFPU_REG_OFFSET( 17 )( sp )
|
||||
store_f f18, portFPU_REG_OFFSET( 18 )( sp )
|
||||
store_f f19, portFPU_REG_OFFSET( 19 )( sp )
|
||||
store_f f20, portFPU_REG_OFFSET( 20 )( sp )
|
||||
store_f f21, portFPU_REG_OFFSET( 21 )( sp )
|
||||
store_f f22, portFPU_REG_OFFSET( 22 )( sp )
|
||||
store_f f23, portFPU_REG_OFFSET( 23 )( sp )
|
||||
store_f f24, portFPU_REG_OFFSET( 24 )( sp )
|
||||
store_f f25, portFPU_REG_OFFSET( 25 )( sp )
|
||||
store_f f26, portFPU_REG_OFFSET( 26 )( sp )
|
||||
store_f f27, portFPU_REG_OFFSET( 27 )( sp )
|
||||
store_f f28, portFPU_REG_OFFSET( 28 )( sp )
|
||||
store_f f29, portFPU_REG_OFFSET( 29 )( sp )
|
||||
store_f f30, portFPU_REG_OFFSET( 30 )( sp )
|
||||
store_f f31, portFPU_REG_OFFSET( 31 )( sp )
|
||||
csrr t0, fcsr
|
||||
store_x t0, portFPU_REG_OFFSET( 32 )( sp )
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextRESTORE_FPU_CONTEXT
|
||||
/* Restore the FPU registers. */
|
||||
load_f f0, portFPU_REG_OFFSET( 0 )( sp )
|
||||
load_f f1, portFPU_REG_OFFSET( 1 )( sp )
|
||||
load_f f2, portFPU_REG_OFFSET( 2 )( sp )
|
||||
load_f f3, portFPU_REG_OFFSET( 3 )( sp )
|
||||
load_f f4, portFPU_REG_OFFSET( 4 )( sp )
|
||||
load_f f5, portFPU_REG_OFFSET( 5 )( sp )
|
||||
load_f f6, portFPU_REG_OFFSET( 6 )( sp )
|
||||
load_f f7, portFPU_REG_OFFSET( 7 )( sp )
|
||||
load_f f8, portFPU_REG_OFFSET( 8 )( sp )
|
||||
load_f f9, portFPU_REG_OFFSET( 9 )( sp )
|
||||
load_f f10, portFPU_REG_OFFSET( 10 )( sp )
|
||||
load_f f11, portFPU_REG_OFFSET( 11 )( sp )
|
||||
load_f f12, portFPU_REG_OFFSET( 12 )( sp )
|
||||
load_f f13, portFPU_REG_OFFSET( 13 )( sp )
|
||||
load_f f14, portFPU_REG_OFFSET( 14 )( sp )
|
||||
load_f f15, portFPU_REG_OFFSET( 15 )( sp )
|
||||
load_f f16, portFPU_REG_OFFSET( 16 )( sp )
|
||||
load_f f17, portFPU_REG_OFFSET( 17 )( sp )
|
||||
load_f f18, portFPU_REG_OFFSET( 18 )( sp )
|
||||
load_f f19, portFPU_REG_OFFSET( 19 )( sp )
|
||||
load_f f20, portFPU_REG_OFFSET( 20 )( sp )
|
||||
load_f f21, portFPU_REG_OFFSET( 21 )( sp )
|
||||
load_f f22, portFPU_REG_OFFSET( 22 )( sp )
|
||||
load_f f23, portFPU_REG_OFFSET( 23 )( sp )
|
||||
load_f f24, portFPU_REG_OFFSET( 24 )( sp )
|
||||
load_f f25, portFPU_REG_OFFSET( 25 )( sp )
|
||||
load_f f26, portFPU_REG_OFFSET( 26 )( sp )
|
||||
load_f f27, portFPU_REG_OFFSET( 27 )( sp )
|
||||
load_f f28, portFPU_REG_OFFSET( 28 )( sp )
|
||||
load_f f29, portFPU_REG_OFFSET( 29 )( sp )
|
||||
load_f f30, portFPU_REG_OFFSET( 30 )( sp )
|
||||
load_f f31, portFPU_REG_OFFSET( 31 )( sp )
|
||||
load_x t0, portFPU_REG_OFFSET( 32 )( sp )
|
||||
csrw fcsr, t0
|
||||
addi sp, sp, ( portFPU_CONTEXT_SIZE )
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontexSAVE_VPU_CONTEXT
|
||||
/* Un-reserve the space reserved for sstatus and epc. */
|
||||
add sp, sp, ( 2 * portWORD_SIZE )
|
||||
|
||||
csrr t0, vlenb /* t0 = vlenb. vlenb is the length of each vector register in bytes. */
|
||||
slli t0, t0, 3 /* t0 = vlenb * 8. t0 now contains the space required to store 8 vector registers. */
|
||||
neg t0, t0
|
||||
|
||||
/* Store the vector registers in group of 8. */
|
||||
add sp, sp, t0
|
||||
vs8r.v v0, (sp) /* Store v0-v7. */
|
||||
add sp, sp, t0
|
||||
vs8r.v v8, (sp) /* Store v8-v15. */
|
||||
add sp, sp, t0
|
||||
vs8r.v v16, (sp) /* Store v16-v23. */
|
||||
add sp, sp, t0
|
||||
vs8r.v v24, (sp) /* Store v24-v31. */
|
||||
|
||||
/* Store the VPU CSRs. */
|
||||
addi sp, sp, -( 4 * portWORD_SIZE )
|
||||
csrr t0, vstart
|
||||
store_x t0, 0 * portWORD_SIZE( sp )
|
||||
csrr t0, vcsr
|
||||
store_x t0, 1 * portWORD_SIZE( sp )
|
||||
csrr t0, vl
|
||||
store_x t0, 2 * portWORD_SIZE( sp )
|
||||
csrr t0, vtype
|
||||
store_x t0, 3 * portWORD_SIZE( sp )
|
||||
|
||||
/* Re-reserve the space for sstatus and epc. */
|
||||
add sp, sp, -( 2 * portWORD_SIZE )
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextRESTORE_VPU_CONTEXT
|
||||
/* Un-reserve the space reserved for sstatus and epc. */
|
||||
add sp, sp, ( 2 * portWORD_SIZE )
|
||||
|
||||
/* Restore the VPU CSRs. */
|
||||
load_x t0, 0 * portWORD_SIZE( sp )
|
||||
csrw vstart, t0
|
||||
load_x t0, 1 * portWORD_SIZE( sp )
|
||||
csrw vcsr, t0
|
||||
load_x t0, 2 * portWORD_SIZE( sp )
|
||||
load_x t1, 3 * portWORD_SIZE( sp )
|
||||
vsetvl x0, t0, t1 /* vlen and vtype can only be updated by using vset*vl* instructions. */
|
||||
addi sp, sp, ( 4 * portWORD_SIZE )
|
||||
|
||||
csrr t0, vlenb /* t0 = vlenb. vlenb is the length of each vector register in bytes. */
|
||||
slli t0, t0, 3 /* t0 = vlenb * 8. t0 now contains the space required to store 8 vector registers. */
|
||||
|
||||
/* Restore the vector registers. */
|
||||
vl8r.v v24, (sp)
|
||||
add sp, sp, t0
|
||||
vl8r.v v16, (sp)
|
||||
add sp, sp, t0
|
||||
vl8r.v v8, (sp)
|
||||
add sp, sp, t0
|
||||
vl8r.v v0, (sp)
|
||||
add sp, sp, t0
|
||||
|
||||
/* Re-reserve the space for sstatus and epc. */
|
||||
add sp, sp, -( 2 * portWORD_SIZE )
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextSAVE_CONTEXT_INTERNAL
|
||||
addi sp, sp, -portCONTEXT_SIZE
|
||||
store_x x1, 2 * portWORD_SIZE( sp )
|
||||
store_x x5, 3 * portWORD_SIZE( sp )
|
||||
store_x x6, 4 * portWORD_SIZE( sp )
|
||||
store_x x7, 5 * portWORD_SIZE( sp )
|
||||
store_x x8, 6 * portWORD_SIZE( sp )
|
||||
store_x x9, 7 * portWORD_SIZE( sp )
|
||||
store_x x10, 8 * portWORD_SIZE( sp )
|
||||
store_x x11, 9 * portWORD_SIZE( sp )
|
||||
store_x x12, 10 * portWORD_SIZE( sp )
|
||||
store_x x13, 11 * portWORD_SIZE( sp )
|
||||
store_x x14, 12 * portWORD_SIZE( sp )
|
||||
store_x x15, 13 * portWORD_SIZE( sp )
|
||||
#ifndef __riscv_32e
|
||||
store_x x16, 14 * portWORD_SIZE( sp )
|
||||
store_x x17, 15 * portWORD_SIZE( sp )
|
||||
store_x x18, 16 * portWORD_SIZE( sp )
|
||||
store_x x19, 17 * portWORD_SIZE( sp )
|
||||
store_x x20, 18 * portWORD_SIZE( sp )
|
||||
store_x x21, 19 * portWORD_SIZE( sp )
|
||||
store_x x22, 20 * portWORD_SIZE( sp )
|
||||
store_x x23, 21 * portWORD_SIZE( sp )
|
||||
store_x x24, 22 * portWORD_SIZE( sp )
|
||||
store_x x25, 23 * portWORD_SIZE( sp )
|
||||
store_x x26, 24 * portWORD_SIZE( sp )
|
||||
store_x x27, 25 * portWORD_SIZE( sp )
|
||||
store_x x28, 26 * portWORD_SIZE( sp )
|
||||
store_x x29, 27 * portWORD_SIZE( sp )
|
||||
store_x x30, 28 * portWORD_SIZE( sp )
|
||||
store_x x31, 29 * portWORD_SIZE( sp )
|
||||
#endif /* ifndef __riscv_32e */
|
||||
|
||||
load_x t0, xCriticalNesting /* Load the value of xCriticalNesting into t0. */
|
||||
store_x t0, portCRITICAL_NESTING_OFFSET * portWORD_SIZE( sp ) /* Store the critical nesting value to the stack. */
|
||||
|
||||
#if( configENABLE_FPU == 1 )
|
||||
csrr t0, sstatus
|
||||
srl t1, t0, MSTATUS_FS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 1f /* If FPU status is not dirty, do not save FPU registers. */
|
||||
|
||||
portcontexSAVE_FPU_CONTEXT
|
||||
1:
|
||||
#endif
|
||||
|
||||
#if( configENABLE_VPU == 1 )
|
||||
csrr t0, sstatus
|
||||
srl t1, t0, MSTATUS_VS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 2f /* If VPU status is not dirty, do not save FPU registers. */
|
||||
|
||||
portcontexSAVE_VPU_CONTEXT
|
||||
2:
|
||||
#endif
|
||||
|
||||
portasmSAVE_ADDITIONAL_REGISTERS /* Defined in freertos_risc_v_chip_specific_extensions.h to save any registers unique to the RISC-V implementation. */
|
||||
|
||||
csrr t0, sstatus
|
||||
store_x t0, 1 * portWORD_SIZE( sp )
|
||||
|
||||
#if( configENABLE_FPU == 1 )
|
||||
/* Mark the FPU as clean, if it was dirty and we saved FPU registers. */
|
||||
srl t1, t0, MSTATUS_FS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 3f
|
||||
|
||||
li t1, ~MSTATUS_FS_MASK
|
||||
and t0, t0, t1
|
||||
li t1, MSTATUS_FS_CLEAN
|
||||
or t0, t0, t1
|
||||
csrw sstatus, t0
|
||||
3:
|
||||
#endif
|
||||
|
||||
#if( configENABLE_VPU == 1 )
|
||||
/* Mark the VPU as clean, if it was dirty and we saved VPU registers. */
|
||||
srl t1, t0, MSTATUS_VS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 4f
|
||||
|
||||
li t1, ~MSTATUS_VS_MASK
|
||||
and t0, t0, t1
|
||||
li t1, MSTATUS_VS_CLEAN
|
||||
or t0, t0, t1
|
||||
csrw sstatus, t0
|
||||
4:
|
||||
#endif
|
||||
|
||||
load_x t0, pxCurrentTCB /* Load pxCurrentTCB. */
|
||||
store_x sp, 0 ( t0 ) /* Write sp to first TCB member. */
|
||||
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextSAVE_EXCEPTION_CONTEXT
|
||||
portcontextSAVE_CONTEXT_INTERNAL
|
||||
csrr a0, scause
|
||||
csrr a1, sepc
|
||||
addi a1, a1, 4 /* Synchronous so update exception return address to the instruction after the instruction that generated the exception. */
|
||||
store_x a1, 0 ( sp ) /* Save updated exception return address. */
|
||||
load_x sp, xISRStackTop /* Switch to ISR stack. */
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextSAVE_INTERRUPT_CONTEXT
|
||||
portcontextSAVE_CONTEXT_INTERNAL
|
||||
csrr a0, scause
|
||||
csrr a1, sepc
|
||||
store_x a1, 0 ( sp ) /* Asynchronous interrupt so save unmodified exception return address. */
|
||||
load_x sp, xISRStackTop /* Switch to ISR stack. */
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
.macro portcontextRESTORE_CONTEXT
|
||||
load_x t1, pxCurrentTCB /* Load pxCurrentTCB. */
|
||||
load_x sp, 0 ( t1 ) /* Read sp from first TCB member. */
|
||||
|
||||
/* Load sepc with the address of the instruction in the task to run next. */
|
||||
load_x t0, 0 ( sp )
|
||||
csrw sepc, t0
|
||||
|
||||
/* Restore sstatus register. */
|
||||
load_x t0, 1 * portWORD_SIZE( sp )
|
||||
csrw sstatus, t0
|
||||
|
||||
/* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */
|
||||
portasmRESTORE_ADDITIONAL_REGISTERS
|
||||
|
||||
#if( configENABLE_VPU == 1 )
|
||||
csrr t0, sstatus
|
||||
srl t1, t0, MSTATUS_VS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 5f /* If VPU status is not dirty, do not restore VPU registers. */
|
||||
|
||||
portcontextRESTORE_VPU_CONTEXT
|
||||
5:
|
||||
#endif /* ifdef portasmSTORE_VPU_CONTEXT */
|
||||
|
||||
#if( configENABLE_FPU == 1 )
|
||||
csrr t0, sstatus
|
||||
srl t1, t0, MSTATUS_FS_OFFSET
|
||||
andi t1, t1, 3
|
||||
addi t2, x0, 3
|
||||
bne t1, t2, 6f /* If FPU status is not dirty, do not restore FPU registers. */
|
||||
|
||||
portcontextRESTORE_FPU_CONTEXT
|
||||
6:
|
||||
#endif /* ifdef portasmSTORE_FPU_CONTEXT */
|
||||
|
||||
load_x t0, portCRITICAL_NESTING_OFFSET * portWORD_SIZE( sp ) /* Obtain xCriticalNesting value for this task from task's stack. */
|
||||
load_x t1, pxCriticalNesting /* Load the address of xCriticalNesting into t1. */
|
||||
store_x t0, 0 ( t1 ) /* Restore the critical nesting value for this task. */
|
||||
|
||||
load_x x1, 2 * portWORD_SIZE( sp )
|
||||
load_x x5, 3 * portWORD_SIZE( sp )
|
||||
load_x x6, 4 * portWORD_SIZE( sp )
|
||||
load_x x7, 5 * portWORD_SIZE( sp )
|
||||
load_x x8, 6 * portWORD_SIZE( sp )
|
||||
load_x x9, 7 * portWORD_SIZE( sp )
|
||||
load_x x10, 8 * portWORD_SIZE( sp )
|
||||
load_x x11, 9 * portWORD_SIZE( sp )
|
||||
load_x x12, 10 * portWORD_SIZE( sp )
|
||||
load_x x13, 11 * portWORD_SIZE( sp )
|
||||
load_x x14, 12 * portWORD_SIZE( sp )
|
||||
load_x x15, 13 * portWORD_SIZE( sp )
|
||||
#ifndef __riscv_32e
|
||||
load_x x16, 14 * portWORD_SIZE( sp )
|
||||
load_x x17, 15 * portWORD_SIZE( sp )
|
||||
load_x x18, 16 * portWORD_SIZE( sp )
|
||||
load_x x19, 17 * portWORD_SIZE( sp )
|
||||
load_x x20, 18 * portWORD_SIZE( sp )
|
||||
load_x x21, 19 * portWORD_SIZE( sp )
|
||||
load_x x22, 20 * portWORD_SIZE( sp )
|
||||
load_x x23, 21 * portWORD_SIZE( sp )
|
||||
load_x x24, 22 * portWORD_SIZE( sp )
|
||||
load_x x25, 23 * portWORD_SIZE( sp )
|
||||
load_x x26, 24 * portWORD_SIZE( sp )
|
||||
load_x x27, 25 * portWORD_SIZE( sp )
|
||||
load_x x28, 26 * portWORD_SIZE( sp )
|
||||
load_x x29, 27 * portWORD_SIZE( sp )
|
||||
load_x x30, 28 * portWORD_SIZE( sp )
|
||||
load_x x31, 29 * portWORD_SIZE( sp )
|
||||
#endif /* ifndef __riscv_32e */
|
||||
addi sp, sp, portCONTEXT_SIZE
|
||||
|
||||
sret
|
||||
.endm
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#endif /* PORTCONTEXT_H */
|
||||
206
hbox/hsimulator/risc-v/rom/opensbi/portmacro.h
Normal file
206
hbox/hsimulator/risc-v/rom/opensbi/portmacro.h
Normal file
@@ -0,0 +1,206 @@
|
||||
/*
|
||||
* FreeRTOS Kernel <DEVELOPMENT BRANCH>
|
||||
* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#if __riscv_xlen == 64
|
||||
#define portSTACK_TYPE uint64_t
|
||||
#define portBASE_TYPE int64_t
|
||||
#define portUBASE_TYPE uint64_t
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffffffffffUL
|
||||
#define portPOINTER_SIZE_TYPE uint64_t
|
||||
#elif __riscv_xlen == 32
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE int32_t
|
||||
#define portUBASE_TYPE uint32_t
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#else /* if __riscv_xlen == 64 */
|
||||
#error "Assembler did not define __riscv_xlen"
|
||||
#endif /* if __riscv_xlen == 64 */
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef portBASE_TYPE BaseType_t;
|
||||
typedef portUBASE_TYPE UBaseType_t;
|
||||
typedef portUBASE_TYPE TickType_t;
|
||||
|
||||
/* Legacy type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#ifdef __riscv_32e
|
||||
#define portBYTE_ALIGNMENT 8 /* RV32E uses RISC-V EABI with reduced stack alignment requirements */
|
||||
#else
|
||||
#define portBYTE_ALIGNMENT 16
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Scheduler utilities. */
|
||||
extern void vTaskSwitchContext( void );
|
||||
#define portYIELD() __asm volatile ( "csrs sip,0x02" );
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
do \
|
||||
{ \
|
||||
if( xSwitchRequired != pdFALSE ) \
|
||||
{ \
|
||||
traceISR_EXIT_TO_SCHEDULER(); \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
traceISR_EXIT(); \
|
||||
} \
|
||||
} while( 0 )
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section management. */
|
||||
#define portCRITICAL_NESTING_IN_TCB 0
|
||||
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( "csrc sstatus, 2" )
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( "csrs sstatus, 2" )
|
||||
|
||||
extern size_t xCriticalNesting;
|
||||
#define portENTER_CRITICAL() \
|
||||
{ \
|
||||
portDISABLE_INTERRUPTS(); \
|
||||
xCriticalNesting++; \
|
||||
}
|
||||
|
||||
#define portEXIT_CRITICAL() \
|
||||
{ \
|
||||
xCriticalNesting--; \
|
||||
if( xCriticalNesting == 0 ) \
|
||||
{ \
|
||||
portENABLE_INTERRUPTS(); \
|
||||
} \
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
|
||||
|
||||
/* Check the configuration. */
|
||||
#if ( configMAX_PRIORITIES > 32 )
|
||||
#error "configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice."
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - __builtin_clz( uxReadyPriorities ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. These are
|
||||
* not necessary for to use this port. They are defined so the common demo
|
||||
* files (which build with all the ports) will build. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portNOP() __asm volatile ( " nop " )
|
||||
#define portINLINE __inline
|
||||
|
||||
#ifndef portFORCE_INLINE
|
||||
#define portFORCE_INLINE inline __attribute__( ( always_inline ) )
|
||||
#endif
|
||||
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* configCLINT_BASE_ADDRESS is a legacy definition that was replaced by the
|
||||
* configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions. For
|
||||
* backward compatibility derive the newer definitions from the old if the old
|
||||
* definition is found. */
|
||||
#if defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS ) && ( configCLINT_BASE_ADDRESS == 0 )
|
||||
|
||||
/* Legacy case where configCLINT_BASE_ADDRESS was defined as 0 to indicate
|
||||
* there was no CLINT. Equivalent now is to set the MTIME and MTIMECMP
|
||||
* addresses to 0. */
|
||||
#define configMTIME_BASE_ADDRESS ( 0 )
|
||||
#define configMTIMECMP_BASE_ADDRESS ( 0 )
|
||||
#elif defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS )
|
||||
|
||||
/* Legacy case where configCLINT_BASE_ADDRESS was set to the base address of
|
||||
* the CLINT. Equivalent now is to derive the MTIME and MTIMECMP addresses
|
||||
* from the CLINT address. */
|
||||
#define configMTIME_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0xBFF8UL )
|
||||
#define configMTIMECMP_BASE_ADDRESS ( ( configCLINT_BASE_ADDRESS ) + 0x4000UL )
|
||||
#elif !defined( configMTIME_BASE_ADDRESS ) || !defined( configMTIMECMP_BASE_ADDRESS )
|
||||
#error "configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. Set them to zero if there is no MTIME (machine time) clock. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
|
||||
#endif /* if defined( configCLINT_BASE_ADDRESS ) && !defined( configMTIME_BASE_ADDRESS ) && ( configCLINT_BASE_ADDRESS == 0 ) */
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
@@ -62,6 +62,7 @@ PHDRS
|
||||
SECTIONS
|
||||
{
|
||||
PROVIDE(__stack = ORIGIN(ram) + LENGTH(ram));
|
||||
PROVIDE(__freertos_irq_stack_top = ORIGIN(ram) + LENGTH(ram));
|
||||
|
||||
/*
|
||||
* 向量表
|
||||
@@ -73,7 +74,6 @@ SECTIONS
|
||||
} >ram AT>ram :text
|
||||
|
||||
.init : {
|
||||
. = ORIGIN(ram)+0x400;
|
||||
KEEP (*(.text.init.enter))
|
||||
KEEP (*(.data.init.enter))
|
||||
KEEP (*(SORT_BY_NAME(.init) SORT_BY_NAME(.init.*)))
|
||||
|
||||
@@ -3,7 +3,7 @@ include("${CMAKE_CURRENT_SOURCE_DIR}/../toolchain.cmake")
|
||||
set(PROJECT_NAME rom)
|
||||
project(${PROJECT_NAME} C CXX ASM)
|
||||
|
||||
file(GLOB C_CXX_FILES ../*.h ../*.c ../*.cpp ../*.s *.h *.c *.cpp)
|
||||
file(GLOB C_CXX_FILES ../*.h ../*.c ../*.cpp ../*.s ../*.S *.h *.c *.cpp)
|
||||
|
||||
if(${PICOLIBC})
|
||||
set(CMAKE_C_FLAGS " ${CMAKE_C_FLAGS} \
|
||||
|
||||
@@ -3,7 +3,7 @@ include("${CMAKE_CURRENT_SOURCE_DIR}/../toolchain.cmake")
|
||||
set(PROJECT_NAME rom)
|
||||
project(${PROJECT_NAME} C CXX ASM)
|
||||
|
||||
file(GLOB C_CXX_FILES ../*.h ../*.c ../*.cpp ../*.s *.h *.c *.cpp)
|
||||
file(GLOB C_CXX_FILES ../*.h ../*.c ../*.cpp ../*.s ../*.S *.h *.c *.cpp)
|
||||
|
||||
if(${PICOLIBC})
|
||||
set(CMAKE_C_FLAGS " ${CMAKE_C_FLAGS} \
|
||||
|
||||
Reference in New Issue
Block a user