espressif/esptool
1
0
Fork 0
mirror of https://github.com/espressif/esptool.git synced 2025-10-15 21:07:25 +08:00
Code Issues Packages Projects Releases Wiki Activity

refactor(stub_flasher): Cleanup, make adding new targets easier

Browse Source
This commit is contained in:
radim.karnis
2023-11-01 11:28:57 +08:00
parent d266645176
commit fb7f4dbc22
32 changed files with 78 additions and 280 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
esptool/loader.py
View File

@@ -184,8 +184,6 @@ class ESPLoader(object):
CHIP_NAME = "Espressif device"
IS_STUB = False
FPGA_SLOW_BOOT = False
DEFAULT_PORT = "/dev/ttyUSB0"
USES_RFC2217 = False
@@ -628,7 +626,7 @@ class ESPLoader(object):
# This FPGA delay is for Espressif internal use
if (
self.FPGA_SLOW_BOOT
self.CHIP_NAME == "ESP32"
and os.environ.get("ESPTOOL_ENV_FPGA", "").strip() == "1"
):
delay = extra_delay = 7

2
esptool/targets/esp32.py
View File

@@ -17,8 +17,6 @@ class ESP32ROM(ESPLoader):
IMAGE_CHIP_ID = 0
IS_STUB = False
FPGA_SLOW_BOOT = True
CHIP_DETECT_MAGIC_VALUE = [0x00F01D83]
IROM_MAP_START = 0x400D0000

2
esptool/targets/esp32c3.py
View File

@@ -14,8 +14,6 @@ class ESP32C3ROM(ESP32ROM):
CHIP_NAME = "ESP32-C3"
IMAGE_CHIP_ID = 5
FPGA_SLOW_BOOT = False
IROM_MAP_START = 0x42000000
IROM_MAP_END = 0x42800000
DROM_MAP_START = 0x3C000000

2
esptool/targets/esp32c6.py
View File

@@ -13,8 +13,6 @@ class ESP32C6ROM(ESP32C3ROM):
CHIP_NAME = "ESP32-C6"
IMAGE_CHIP_ID = 13
FPGA_SLOW_BOOT = False
IROM_MAP_START = 0x42000000
IROM_MAP_END = 0x42800000
DROM_MAP_START = 0x42800000

2
esptool/targets/esp32p4.py
View File

@@ -14,8 +14,6 @@ class ESP32P4ROM(ESP32ROM):
CHIP_NAME = "ESP32-P4"
IMAGE_CHIP_ID = 18
FPGA_SLOW_BOOT = False
IROM_MAP_START = 0x40000000
IROM_MAP_END = 0x44000000
DROM_MAP_START = 0x40000000

2
esptool/targets/esp32s2.py
View File

@@ -16,8 +16,6 @@ class ESP32S2ROM(ESP32ROM):
CHIP_NAME = "ESP32-S2"
IMAGE_CHIP_ID = 2
FPGA_SLOW_BOOT = False
IROM_MAP_START = 0x40080000
IROM_MAP_END = 0x40B80000
DROM_MAP_START = 0x3F000000

2
esptool/targets/esp32s3.py
View File

@@ -19,8 +19,6 @@ class ESP32S3ROM(ESP32ROM):
CHIP_DETECT_MAGIC_VALUE = [0x9]
FPGA_SLOW_BOOT = False
IROM_MAP_START = 0x42000000
IROM_MAP_END = 0x44000000
DROM_MAP_START = 0x3C000000

47
flasher_stub/include/soc_support.h
View File

@@ -63,11 +63,16 @@
#endif // ESP32P4
// Increase CPU freq to speed up read/write operations over USB
// Temporarily disabled on the S3 due to stability issues, will be fixed in the next minor release
// Disabled on the S3 due to stability issues, would require dbias adjustment.
// https://github.com/espressif/esptool/issues/832, https://github.com/espressif/esptool/issues/808
#define USE_MAX_CPU_FREQ ((WITH_USB_JTAG_SERIAL || WITH_USB_OTG) && !ESP32S3)
// Later chips don't support ets_efuse_get_spiconfig.
#define SUPPORT_CONFIG_SPI (ESP32 || ESP32S2 || ESP32S3 || ESP32S3BETA2 || ESP32C3 || ESP32H2BETA1 || ESP32H2BETA2 || ESP32C6BETA)
/**********************************************************
* Per-SOC based peripheral register base addresses
* Sync with reg_base.h in ESP-IDF
*/
#ifdef ESP8266
#define UART_BASE_REG 0x60000000 /* UART0 */
@@ -380,21 +385,6 @@
* SYSTEM registers
*/
#ifdef ESP32S3
#define SYSTEM_CPU_PER_CONF_REG (SYSTEM_BASE_REG + 0x010)
#define SYSTEM_CPUPERIOD_SEL_M ((SYSTEM_CPUPERIOD_SEL_V)<<(SYSTEM_CPUPERIOD_SEL_S))
#define SYSTEM_CPUPERIOD_SEL_V 0x3
#define SYSTEM_CPUPERIOD_SEL_S 0
#define SYSTEM_CPUPERIOD_MAX 1 // CPU_CLK frequency is 160 MHz - not actually max possible frequency,
// see https://github.com/espressif/esptool/issues/832 and https://github.com/espressif/esptool/issues/808
#define SYSTEM_SYSCLK_CONF_REG (SYSTEM_BASE_REG + 0x060)
#define SYSTEM_SOC_CLK_SEL_M ((SYSTEM_SOC_CLK_SEL_V)<<(SYSTEM_SOC_CLK_SEL_S))
#define SYSTEM_SOC_CLK_SEL_V 0x3
#define SYSTEM_SOC_CLK_SEL_S 10
#define SYSTEM_SOC_CLK_MAX 1
#endif // ESP32S3
#ifdef ESP32C3
#define SYSTEM_CPU_PER_CONF_REG (SYSTEM_BASE_REG + 0x008)
#define SYSTEM_CPUPERIOD_SEL_M ((SYSTEM_CPUPERIOD_SEL_V)<<(SYSTEM_CPUPERIOD_SEL_S))
@@ -450,3 +440,28 @@
#if ESP32S3_OR_LATER
#define SECURITY_INFO_BYTES 20
#endif // ESP32S3_OR_LATER
/**********************************************************
* Per-SOC address of the rom_spiflash_legacy_funcs symbol in ROM
* Can be retrieved with gdb: "info address rom_spiflash_legacy_funcs"
*/
#if ESP32 || ESP32S2 || ESP32S3
#define ROM_SPIFLASH_LEGACY 0x3ffae270
#endif // ESP32 || ESP32S2 || ESP32S3
#if ESP32C3 || ESP32C6BETA || ESP32C2 || ESP32C6
#define ROM_SPIFLASH_LEGACY 0x3fcdfff4
#endif // ESP32C3 || ESP32C6BETA || ESP32C2 || ESP32C6
#if ESP32H2BETA1 || ESP32H2BETA2
#define ROM_SPIFLASH_LEGACY 0x3fcdfff0
#endif // ESP32H2BETA1 || ESP32H2BETA2
#if ESP32H2
#define ROM_SPIFLASH_LEGACY 0x4084fff0
#endif // ESP32H2
#if ESP32P4
#define ROM_SPIFLASH_LEGACY 0x4ff3ffec
#endif // ESP32P4

7
flasher_stub/ld/rom_32h2.ld
View File

@@ -1,8 +1,3 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
/* ROM function interface esp32h2.rom.ld for esp32h2
*
*
@@ -22,7 +17,7 @@ PROVIDE ( SPI_read_status_high = esp_rom_spiflash_read_statushigh);
PROVIDE ( SPI_write_status = esp_rom_spiflash_write_status);
PROVIDE ( SPIRead = esp_rom_spiflash_read);
PROVIDE ( SPIParamCfg = esp_rom_spiflash_config_param);
PROVIDE ( SPIEraseChip = esp_rom_spiflash_erase_chip);
PROVIDE ( SPIEraseChip = esp_rom_spiflash_erase_chip);
PROVIDE ( SPIEraseSector = esp_rom_spiflash_erase_sector);
PROVIDE ( SPIEraseBlock = esp_rom_spiflash_erase_block);
PROVIDE ( SPI_Write_Encrypt_Enable = esp_rom_spiflash_write_encrypted_enable);

17
flasher_stub/ld/stub_32.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2016 Cesanta Software Limited
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
/* Note: stub is deliberately loaded close to the very top
of available RAM, to reduce change of colliding with anything
else... */

6
flasher_stub/ld/stub_32c3.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40380000, len = 0x4000
dram : org = 0x3FC84000, len = 0x18000

17
flasher_stub/ld/stub_32c6.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2022 Espressif Systems (Shanghai) PTE LTD
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
MEMORY {
iram : org = 0x40800000, len = 0x4000
dram : org = 0x40840000, len = 0x18000

6
flasher_stub/ld/stub_32c6_beta.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40380000, len = 0x4000
dram : org = 0x3FC84000, len = 0x18000

6
flasher_stub/ld/stub_32h2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40800000, len = 0x4000
dram : org = 0x40830000, len = 0x18000

6
flasher_stub/ld/stub_32h2_beta_1.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40380000, len = 0x4000
dram : org = 0x3FC84000, len = 0x18000

6
flasher_stub/ld/stub_32h2_beta_2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40380000, len = 0x4000
dram : org = 0x3FC84000, len = 0x18000

17
flasher_stub/ld/stub_32p4.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) PTE LTD
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
MEMORY {
iram : org = 0x4FF10000, len = 0x4000
dram : org = 0x4FF50000, len = 0x18000

6
flasher_stub/ld/stub_32s2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40028000, len = 0x18000
dram : org = 0x3FFD0000, len = 0x28000

6
flasher_stub/ld/stub_32s3.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40378000, len = 0x18000
dram : org = 0x3FCA0000, len = 0x28000

6
flasher_stub/ld/stub_32s3_beta_2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40378000, len = 0x18000
dram : org = 0x3FCA0000, len = 0x28000

17
flasher_stub/ld/stub_8266.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2016 Cesanta Software Limited
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
/* Note: stub is deliberately loaded close to the very top
of available RAM, to reduce change of colliding with anything
else... */

75
flasher_stub/stub_flasher.c
View File

@@ -466,67 +466,72 @@ void stub_main()
{
const uint32_t greeting = 0x4941484f; /* OHAI */
/* this points to stub_main now, clear for next boot */
/* This points to stub_main now, clear for next boot. */
ets_set_user_start(0);
/* Increase CPU frequency and flashing speed if supported. */
#if USE_MAX_CPU_FREQ
set_max_cpu_freq();
#endif // USE_MAX_CPU_FREQ
/* Disable all watchdogs to prevent the chip from resetting during longer operations. */
#if WITH_USB_JTAG_SERIAL
disable_watchdogs();
#endif // WITH_USB_JTAG_SERIAL
/* zero bss */
/* Zero the bss region. */
for(uint32_t *p = &_bss_start; p < &_bss_end; p++) {
*p = 0;
}
/* Send the OHAI greeting, stub will be reported as running. */
SLIP_send(&greeting, 4);
/* Configure the interrupts for receiving data from esptool on the host. */
ub.reading_buf = ub.buf_a;
stub_io_init(&stub_handle_rx_byte);
/* Configure default SPI flash functionality.
Can be overriden later by esptool.py. */
#ifdef ESP8266
SelectSpiFunction();
#ifdef ESP8266
SelectSpiFunction();
spi_flash_attach();
#else
#if SUPPORT_CONFIG_SPI
uint32_t spiconfig = ets_efuse_get_spiconfig();
#else
uint32_t spiconfig = 0;
#endif // SUPPORT_CONFIG_SPI
uint32_t strapping = READ_REG(GPIO_STRAP_REG);
/* If GPIO1 (U0TXD) is pulled low and no other boot mode is
set in efuse, assume HSPI flash mode (same as normal boot)
*/
if (spiconfig == 0 && (strapping & 0x1c) == 0x08) {
spiconfig = 1; /* HSPI flash mode */
}
spi_flash_attach(spiconfig, 0);
#endif // ESP8266
spi_flash_attach();
#else
#if !ESP32C2 && !ESP32C6 && !ESP32H2 && !ESP32P4
uint32_t spiconfig = ets_efuse_get_spiconfig();
#else
// ESP32C2/ESP32C6 doesn't support get spiconfig.
uint32_t spiconfig = 0;
#endif
uint32_t strapping = READ_REG(GPIO_STRAP_REG);
/* If GPIO1 (U0TXD) is pulled low and no other boot mode is
set in efuse, assume HSPI flash mode (same as normal boot)
*/
if (spiconfig == 0 && (strapping & 0x1c) == 0x08) {
spiconfig = 1; /* HSPI flash mode */
}
spi_flash_attach(spiconfig, 0);
#endif
#if ESP32S3 && !ESP32S3BETA2
large_flash_mode = ets_efuse_flash_octal_mode() || flash_larger_than_16mb();
/* Initialize the OPI flash driver if supported. */
#if ESP32S3 && !ESP32S3BETA2
large_flash_mode = ets_efuse_flash_octal_mode() || flash_larger_than_16mb();
// Initialize OPI flash driver only when flash is detected octal or quad larger than 16MB.
// Otherwise, we don't need to initialize such a driver
if (large_flash_mode) {
static const esp_rom_opiflash_def_t flash_driver = OPIFLASH_DRIVER();
esp_rom_opiflash_legacy_driver_init(&flash_driver);
esp_rom_opiflash_wait_idle();
}
#endif //ESP32S3 && !ESP32S3BETA2
SPIParamCfg(0, FLASH_MAX_SIZE, FLASH_BLOCK_SIZE, FLASH_SECTOR_SIZE,
FLASH_PAGE_SIZE, FLASH_STATUS_MASK);
// Initialize OPI flash driver only when flash is detected octal or quad larger than 16MB.
// Otherwise, we don't need to initialize such a driver
if (large_flash_mode) {
static const esp_rom_opiflash_def_t flash_driver = OPIFLASH_DRIVER();
esp_rom_opiflash_legacy_driver_init(&flash_driver);
esp_rom_opiflash_wait_idle();
}
#endif //ESP32S3 && !ESP32S3BETA2
SPIParamCfg(0, FLASH_MAX_SIZE, FLASH_BLOCK_SIZE, FLASH_SECTOR_SIZE,
FLASH_PAGE_SIZE, FLASH_STATUS_MASK);
/* Configurations are done, now run the loop to receive and handle commands. */
cmd_loop();
/* if cmd_loop returns, it's due to ESP_RUN_USER_CODE command. */
/* If cmd_loop returns, it's due to ESP_RUN_USER_CODE command. */
/* Decrease CPU frequency back to the saved value before the stub flasher returns. */
#if USE_MAX_CPU_FREQ
reset_cpu_freq();
#endif // USE_MAX_CPU_FREQ

20
flasher_stub/stub_write_flash.c
View File

@@ -96,17 +96,7 @@ static void spi_write_enable(void)
}
#if ESP32_OR_LATER
#if ESP32C3 || ESP32C6BETA || ESP32C2 || ESP32C6
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)0x3fcdfff4;
#elif ESP32H2BETA1 || ESP32H2BETA2
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)0x3fcdfff0;
#elif ESP32H2
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)0x4084fff0;
#elif ESP32P4
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)0x4ff3ffec;
#else
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)0x3ffae270;
#endif
static esp_rom_spiflash_chip_t *flashchip = (esp_rom_spiflash_chip_t *)ROM_SPIFLASH_LEGACY;
/* Stub version of SPIUnlock() that replaces version in ROM.
@@ -128,7 +118,7 @@ SpiFlashOpResult SPIUnlock(void)
if (SPI_read_status_high(&status) != SPI_FLASH_RESULT_OK) {
return SPI_FLASH_RESULT_ERR;
}
#endif
#endif // ESP32S2_OR_LATER
/* Clear all bits except QIE, if it is set.
(This is different from ROM SPIUnlock, which keeps all bits as-is.)
@@ -144,7 +134,7 @@ SpiFlashOpResult SPIUnlock(void)
return SPI_FLASH_RESULT_OK;
}
#endif
#endif // ESP32_OR_LATER
#if defined(ESP32S3) && !defined(ESP32S3BETA2)
static esp_rom_spiflash_result_t page_program_internal(int spi_num, uint32_t spi_addr, uint8_t* addr_source, uint32_t byte_length)
@@ -205,7 +195,7 @@ static esp_rom_spiflash_result_t SPIWrite4B(int spi_num, uint32_t target, uint8_
esp_rom_opiflash_wait_idle();
return ESP_ROM_SPIFLASH_RESULT_OK;
}
#endif // ESP32S3
#endif // defined(ESP32S3) && !defined(ESP32S3BETA2)
esp_command_error handle_flash_begin(uint32_t total_size, uint32_t offset) {
fs.in_flash_mode = true;
@@ -363,7 +353,7 @@ void handle_flash_data(void *data_buf, uint32_t length) {
}
#else
res = SPIWrite(fs.next_write, data_buf, length);
#endif // ESP32S3
#endif // defined(ESP32S3) && !defined(ESP32S3BETA2)
if (res != 0)
fs.last_error = ESP_FAILED_SPI_OP;
fs.next_write += length;

17
test/images/ram_helloworld/source/ld/app_32.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2016 Cesanta Software Limited
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
MEMORY {
iram : org = 0x4008c000, len = 0x1000
dram : org = 0x3ffc0000, len = 0xc000

7
test/images/ram_helloworld/source/ld/app_32c2.ld
View File

@@ -1,10 +1,3 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40390000, len = 0x100
dram : org = 0x3FCD0000, len = 0x100

6
test/images/ram_helloworld/source/ld/app_32c3.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x403DFD00, len = 0x100
dram : org = 0x3FCDFD00, len = 0x100

6
test/images/ram_helloworld/source/ld/app_32c6.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40860000, len = 0x100
dram : org = 0x40870000, len = 0x100

6
test/images/ram_helloworld/source/ld/app_32h2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40804000, len = 0x100
dram : org = 0x40848000, len = 0x100

6
test/images/ram_helloworld/source/ld/app_32p4.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x4FF60000, len = 0x100
dram : org = 0x4FF70000, len = 0x100

6
test/images/ram_helloworld/source/ld/app_32s2.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40020000, len = 0x8000
dram : org = 0x3FFC8000, len = 0x8000

6
test/images/ram_helloworld/source/ld/app_32s3.ld
View File

@@ -1,9 +1,3 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
MEMORY {
iram : org = 0x40380000, len = 0x100
dram : org = 0x3FCA0000, len = 0x100

17
test/images/ram_helloworld/source/ld/app_8266.ld
View File

@@ -1,20 +1,3 @@
/*
* Copyright (c) 2016 Cesanta Software Limited
* All rights reserved
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
* Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
MEMORY {
iram : org = 0x40108000, len = 0x2000
dram : org = 0x3FFE8000, len = 0x100