mirror of
https://github.com/joncampbell123/dosbox-x.git
synced 2025-10-14 02:17:36 +08:00
add option to emulate the PC/XT NMI mask register (port A0h). since A0h
conflicts with the slave PIC, the option does nothing unless the slave PIC is disabled.
This commit is contained in:
@@ -912,6 +912,9 @@ void DOSBOX_Init(void) {
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Pbool = secprop->Add_bool("enable slave pic",Property::Changeable::WhenIdle,true);
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Pbool->Set_help("Enable slave PIC (IRQ 8-15). Set this to 0 if you want to emulate a PC/XT type arrangement with IRQ 0-7 and no IRQ 2 cascade.");
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Pbool = secprop->Add_bool("enable pc nmi mask",Property::Changeable::WhenIdle,true);
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Pbool->Set_help("Enable PC/XT style NMI mask register (0xA0). Note that this option conflicts with the secondary PIC and will be ignored if the slave PIC is enabled.");
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secprop->AddInitFunction(&CALLBACK_Init);
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secprop->AddInitFunction(&DMA_Init);//done
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secprop->AddInitFunction(&PIC_Init);//done
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@@ -115,6 +115,7 @@ static PIC_Controller& slave = pics[1];
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Bitu PIC_Ticks = 0;
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Bitu PIC_IRQCheck = 0; //Maybe make it a bool and/or ensure 32bit size (x86 dynamic core seems to assume 32 bit variable size)
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bool enable_slave_pic = true; /* if set, emulate slave with cascade to master. if clear, emulate only master, and no cascade (IRQ 2 is open) */
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bool enable_pc_xt_nmi_mask = false;
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void PIC_Controller::set_imr(Bit8u val) {
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Bit8u change = (imr) ^ (val); //Bits that have changed become 1.
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@@ -280,6 +281,14 @@ static Bitu read_data(Bitu port,Bitu iolen) {
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return pic->imr;
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}
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/* PC/XT NMI mask register 0xA0. Documentation on the other bits
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* is sparse and spread across the internet, but many seem to
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* agree that bit 7 is used to enable/disable the NMI (1=enable,
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* 0=disable) */
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static void pc_xt_nmi_write(Bitu port,Bitu val,Bitu iolen) {
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CPU_NMI_gate = (val & 0x80) ? true : false;
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}
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void PIC_ActivateIRQ(Bitu irq) {
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/* Remember what was once IRQ 2 on PC/XT is IRQ 9 on PC/AT */
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if (enable_slave_pic) { /* PC/AT emulation with slave PIC cascade to master */
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@@ -609,6 +618,8 @@ void TIMER_AddTick(void) {
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}
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}
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static IO_WriteHandleObject PCXT_NMI_WriteHandler;
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/* Use full name to avoid name clash with compile option for position-independent code */
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class PIC_8259A: public Module_base {
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private:
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@@ -619,6 +630,7 @@ public:
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Section_prop * section=static_cast<Section_prop *>(configuration);
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enable_slave_pic = section->Get_bool("enable slave pic");
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enable_pc_xt_nmi_mask = section->Get_bool("enable pc nmi mask");
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/* Setup pic0 and pic1 with initial values like DOS has normally */
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PIC_IRQCheck=0;
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@@ -648,12 +660,18 @@ public:
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ReadHandler[1].Install(0x21,read_data,IO_MB);
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WriteHandler[0].Install(0x20,write_command,IO_MB);
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WriteHandler[1].Install(0x21,write_data,IO_MB);
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/* the secondary slave PIC takes priority over PC/XT NMI mask emulation */
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if (enable_slave_pic) {
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ReadHandler[2].Install(0xa0,read_command,IO_MB);
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ReadHandler[3].Install(0xa1,read_data,IO_MB);
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WriteHandler[2].Install(0xa0,write_command,IO_MB);
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WriteHandler[3].Install(0xa1,write_data,IO_MB);
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}
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else if (enable_pc_xt_nmi_mask) {
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PCXT_NMI_WriteHandler.Install(0xa0,pc_xt_nmi_write,IO_MB);
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}
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/* Initialize the pic queue */
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for (i=0;i<PIC_QUEUESIZE-1;i++) {
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pic_queue.entries[i].next=&pic_queue.entries[i+1];
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