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target/cortex_a: Use 'bool' data type in cortex_a_mmu_modify()
The variables are already used as boolean value but have the wrong data type. Change-Id: Ia1660751063993fcf46c86246e93a75089629ab5 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8991 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit is contained in:

committed by
Antonio Borneo

parent
d20878b776
commit
218ea2658a
@@ -69,7 +69,7 @@ static int cortex_a_unset_breakpoint(struct target *target,
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static int cortex_a_wait_dscr_bits(struct target *target, uint32_t mask,
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uint32_t value, uint32_t *dscr);
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static int cortex_a_mmu(struct target *target, bool *enabled);
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static int cortex_a_mmu_modify(struct target *target, int enable);
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static int cortex_a_mmu_modify(struct target *target, bool enable);
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static int cortex_a_virt2phys(struct target *target,
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target_addr_t virt, target_addr_t *phys);
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static int cortex_a_read_cpu_memory(struct target *target,
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@@ -119,7 +119,7 @@ static int cortex_a_prep_memaccess(struct target *target, bool phys_access)
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arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_SVC);
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cortex_a_mmu(target, &mmu_enabled);
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if (mmu_enabled)
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cortex_a_mmu_modify(target, 1);
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cortex_a_mmu_modify(target, true);
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if (cortex_a->dacrfixup_mode == CORTEX_A_DACRFIXUP_ON) {
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/* overwrite DACR to all-manager */
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armv7a->arm.mcr(target, 15,
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@@ -129,7 +129,7 @@ static int cortex_a_prep_memaccess(struct target *target, bool phys_access)
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} else {
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cortex_a_mmu(target, &mmu_enabled);
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if (mmu_enabled)
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cortex_a_mmu_modify(target, 0);
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cortex_a_mmu_modify(target, false);
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}
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return ERROR_OK;
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}
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@@ -156,7 +156,7 @@ static int cortex_a_post_memaccess(struct target *target, bool phys_access)
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bool mmu_enabled = false;
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cortex_a_mmu(target, &mmu_enabled);
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if (mmu_enabled)
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cortex_a_mmu_modify(target, 1);
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cortex_a_mmu_modify(target, true);
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}
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return ERROR_OK;
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}
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@@ -165,12 +165,12 @@ static int cortex_a_post_memaccess(struct target *target, bool phys_access)
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/* modify cp15_control_reg in order to enable or disable mmu for :
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* - virt2phys address conversion
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* - read or write memory in phys or virt address */
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static int cortex_a_mmu_modify(struct target *target, int enable)
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static int cortex_a_mmu_modify(struct target *target, bool enable)
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{
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struct cortex_a_common *cortex_a = target_to_cortex_a(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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int retval = ERROR_OK;
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int need_write = 0;
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bool need_write = false;
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if (enable) {
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/* if mmu enabled at target stop and mmu not enable */
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@@ -180,12 +180,12 @@ static int cortex_a_mmu_modify(struct target *target, int enable)
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}
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if ((cortex_a->cp15_control_reg_curr & 0x1U) == 0) {
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cortex_a->cp15_control_reg_curr |= 0x1U;
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need_write = 1;
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need_write = true;
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}
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} else {
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if ((cortex_a->cp15_control_reg_curr & 0x1U) == 0x1U) {
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cortex_a->cp15_control_reg_curr &= ~0x1U;
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need_write = 1;
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need_write = true;
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}
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}
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@@ -3285,7 +3285,7 @@ static int cortex_a_virt2phys(struct target *target,
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}
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/* mmu must be enable in order to get a correct translation */
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retval = cortex_a_mmu_modify(target, 1);
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retval = cortex_a_mmu_modify(target, true);
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if (retval != ERROR_OK)
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return retval;
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return armv7a_mmu_translate_va_pa(target, (uint32_t)virt,
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