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flash, target: avoid logging of numeric target state

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Replace it by target_state_name() helper.

Change-Id: I720f2bf121e6fd2c6987a7e8fa9e52593888ee6c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8918
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Tomas Vanek
2025-05-18 11:49:31 +02:00
committed by Antonio Borneo
parent 8b47a0736b
commit 9b30e05137
6 changed files with 11 additions and 10 deletions
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4
src/flash/nor/ambiqmicro.c
View File

@@ -309,9 +309,9 @@ static int ambiqmicro_exec_command(struct target *target,
*/
target_poll(target);
alive_sleep(100);
LOG_DEBUG("state = %d", target->state);
} else {
LOG_ERROR("Target not halted or running %d", target->state);
LOG_ERROR("Target not halted or running (state is %s)",
target_state_name(target));
break;
}
}

4
src/target/espressif/esp32.c
View File

@@ -192,8 +192,8 @@ static int esp32_soc_reset(struct target *target)
alive_sleep(10);
xtensa_poll(target);
if (timeval_ms() >= timeout) {
LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state=%d",
target->state);
LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state %s",
target_state_name(target));
get_timeout = true;
break;
}

4
src/target/espressif/esp32s2.c
View File

@@ -272,8 +272,8 @@ static int esp32s2_soc_reset(struct target *target)
alive_sleep(10);
xtensa_poll(target);
if (timeval_ms() >= timeout) {
LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state=%d",
target->state);
LOG_TARGET_ERROR(target, "Timed out waiting for CPU to be reset, target state %s",
target_state_name(target));
return ERROR_TARGET_TIMEOUT;
}
}

4
src/target/espressif/esp32s3.c
View File

@@ -193,8 +193,8 @@ static int esp32s3_soc_reset(struct target *target)
xtensa_poll(target);
if (timeval_ms() >= timeout) {
LOG_TARGET_ERROR(target,
"Timed out waiting for CPU to be reset, target state=%d",
target->state);
"Timed out waiting for CPU to be reset, target state %s",
target_state_name(target));
get_timeout = true;
break;
}

2
src/target/stm8.c
View File

@@ -870,7 +870,7 @@ static int stm8_poll(struct target *target)
uint8_t csr1, csr2;
#ifdef LOG_STM8
LOG_DEBUG("target->state=%d", target->state);
LOG_DEBUG("target->state %s", target_state_name(target));
#endif
/* read dm_csrx control regs */

3
src/target/xtensa/xtensa.c
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@@ -949,7 +949,8 @@ int xtensa_smpbreak_set(struct target *target, uint32_t set)
xtensa->smp_break = set;
if (target_was_examined(target))
res = xtensa_smpbreak_write(xtensa, xtensa->smp_break);
LOG_TARGET_DEBUG(target, "set smpbreak=%" PRIx32 ", state=%i", set, target->state);
LOG_TARGET_DEBUG(target, "set smpbreak=%" PRIx32 ", state %s", set,
target_state_name(target));
return res;
}