cortex_m3: add auto maskisr

This patch extends the cortex_m3 maskisr command by a new option 'auto'.
The 'auto' option handles interrupts during stepping in a way they are
processed but don't disturb the program flow during debugging.

Before one had to choose to either enable or disable interrupts. The former
steps into interrupt handlers when they trigger. This disturbs the flow during
debugging, making it hard to follow some piece of code when interrupts occur
often.

When interrupts are disabled, the flow isn't disturbed but code relying on
interrupt handlers to be processed will stop working. For example a delay
function counting the number of timer interrupts will never complete, RTOS
task switching will not occur and output I/O queues of interrupt driven
I/O will stall or overflow.

Using the 'maskisr' command also typically requires gdb hooks to be supplied
by the user to switch interrupts off during the step and to enable them again
afterward.

The new 'auto' option of the 'maskisr' command solves the above problems. When
set, the step command allows pending interrupt handlers to be executed before
the step, then the step is taken with interrupts disabled and finally interrupts
are enabled again. This way interrupt processing stays in the background without
disturbing the flow of debugging. No gdb hooks are required. The 'auto'
option is the default, since it's believed that handling interrupts in this
way is suitable for most users.

The principle used for interrupt handling could probably be used for other
targets too.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>

src/flash/nor/Makefile.am

@@ -30,9 +30,11 @@ NOR_DRIVERS = \
 	str9x.c \
 	str9xpec.c \
 	tms470.c \
-	dsp5680xx_flash.c \
 	virtual.c
 
+# Disabled for now, it generates warnings
+# dsp5680xx_flash.c 
+
 noinst_HEADERS = \
 	core.h \
 	cfi.h \

src/flash/nor/drivers.c

@@ -43,7 +43,7 @@ extern struct flash_driver faux_flash;
 extern struct flash_driver virtual_flash;
 extern struct flash_driver stmsmi_flash;
 extern struct flash_driver em357_flash;
-extern struct flash_driver dsp5680xx_flash;
+//extern struct flash_driver dsp5680xx_flash;
 
 /**
  * The list of built-in flash drivers.
@@ -72,7 +72,8 @@ static struct flash_driver *flash_drivers[] = {
 	&virtual_flash,
 	&stmsmi_flash,
 	&em357_flash,
-	&dsp5680xx_flash,
+	// Disabled for now, it generates warnings
+	//&dsp5680xx_flash,
 	NULL,
 };
 

src/target/Makefile.am

@@ -33,8 +33,10 @@ libtarget_la_SOURCES = \
 	$(MIPS32_SRC) \
 	avrt.c \
 	dsp563xx.c \
-	dsp563xx_once.c \
-	dsp5680xx.c
+	dsp563xx_once.c
+	
+# This file generates warnings, disabled for now, see also target.c
+#	dsp5680xx.c
 
 TARGET_CORE_SRC = \
 	algorithm.c \

src/target/dsp5680xx.c

@@ -28,6 +28,9 @@
 #include "target_type.h"
 #include "dsp5680xx.h"
 
+struct dsp5680xx_common dsp5680xx_context;
+
+
 #define err_check(retval,err_msg) if(retval != ERROR_OK){LOG_ERROR("%s: %d %s.",__FUNCTION__,__LINE__,err_msg);return retval;}
 #define err_check_propagate(retval) if(retval!=ERROR_OK){return retval;}
 
@@ -62,7 +65,7 @@ static int dsp5680xx_drscan(struct target * target, uint8_t * data_to_shift_into
   //can i send as many bits as i want?
   //is the casting necessary?
   jtag_add_plain_dr_scan(len,data_to_shift_into_dr,data_shifted_out_of_dr, TAP_IDLE);
-  if(context.flush){
+  if(dsp5680xx_context.flush){
 	retval = dsp5680xx_execute_queue();
 	err_check_propagate(retval);
   }
@@ -94,7 +97,7 @@ static int dsp5680xx_irscan(struct target * target, uint32_t * data_to_shift_int
   //can i send as many bits as i want?
   //is the casting necessary?
   jtag_add_plain_ir_scan(ir_len,(uint8_t *)data_to_shift_into_ir,(uint8_t *)data_shifted_out_of_ir, TAP_IDLE);
-  if(context.flush){
+  if(dsp5680xx_context.flush){
     retval = dsp5680xx_execute_queue();
     err_check_propagate(retval);
   }
@@ -505,7 +508,7 @@ static int eonce_pc_store(struct target * target){
   retval = eonce_rx_lower_data(target,(uint16_t *)&tmp);
   err_check_propagate(retval);
   LOG_USER("PC value: 0x%06X\n",tmp);
-  context.stored_pc = (uint32_t)tmp;
+  dsp5680xx_context.stored_pc = (uint32_t)tmp;
   return ERROR_OK;
 }
 
@@ -516,8 +519,8 @@ static int dsp5680xx_target_create(struct target *target, Jim_Interp * interp){
 }
 
 static int dsp5680xx_init_target(struct command_context *cmd_ctx, struct target *target){
-  context.stored_pc = 0;
-  context.flush = 1;
+  dsp5680xx_context.stored_pc = 0;
+  dsp5680xx_context.flush = 1;
   LOG_DEBUG("target initiated!");
   //TODO core tap must be enabled before running these commands, currently this is done in the .cfg tcl script.
   return ERROR_OK;
@@ -739,12 +742,12 @@ static int dsp5680xx_read(struct target * target, uint32_t address, unsigned siz
   retval = dsp5680xx_convert_address(&address, &pmem);
   err_check_propagate(retval);
 
-  context.flush = 0;
+  dsp5680xx_context.flush = 0;
   int counter = FLUSH_COUNT_READ_WRITE;
 
   for (unsigned i=0; i<count; i++){
     if(--counter==0){
-      context.flush = 1;
+      dsp5680xx_context.flush = 1;
       counter = FLUSH_COUNT_FLASH;
     }
     switch (size){
@@ -766,10 +769,10 @@ static int dsp5680xx_read(struct target * target, uint32_t address, unsigned siz
       break;
     }
 	err_check_propagate(retval);
-    context.flush = 0;
+    dsp5680xx_context.flush = 0;
   }
 
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   retval = dsp5680xx_execute_queue();
   err_check_propagate(retval);
 
@@ -823,18 +826,18 @@ static int dsp5680xx_write_8(struct target * target, uint32_t address, uint32_t
   int counter = FLUSH_COUNT_READ_WRITE;
   for(iter = 0; iter<count/2; iter++){
     if(--counter==0){
-      context.flush = 1;
+      dsp5680xx_context.flush = 1;
       counter = FLUSH_COUNT_READ_WRITE;
     }
     retval = dsp5680xx_write_16_single(target,address+iter,data_w[iter], pmem);
     if(retval != ERROR_OK){
       LOG_ERROR("%s: Could not write to p:0x%04X",__FUNCTION__,address);
-      context.flush = 1;
+      dsp5680xx_context.flush = 1;
       return retval;
     }
-    context.flush = 0;
+    dsp5680xx_context.flush = 0;
   }
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
 
   // Only one byte left, let's not overwrite the other byte (mem is 16bit)
   // Need to retrieve the part we do not want to overwrite.
@@ -863,18 +866,18 @@ static int dsp5680xx_write_16(struct target * target, uint32_t address, uint32_t
 
   for(iter = 0; iter<count; iter++){
 	if(--counter==0){
-	  context.flush = 1;
+	  dsp5680xx_context.flush = 1;
       counter = FLUSH_COUNT_READ_WRITE;
 	}
     retval = dsp5680xx_write_16_single(target,address+iter,data[iter], pmem);
     if(retval != ERROR_OK){
       LOG_ERROR("%s: Could not write to p:0x%04X",__FUNCTION__,address);
-	  context.flush = 1;
+	  dsp5680xx_context.flush = 1;
       return retval;
     }
-	context.flush = 0;
+	dsp5680xx_context.flush = 0;
   }
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   return retval;
 }
 
@@ -889,18 +892,18 @@ static int dsp5680xx_write_32(struct target * target, uint32_t address, uint32_t
 
   for(iter = 0; iter<count; iter++){
 	if(--counter==0){
-	  context.flush = 1;
+	  dsp5680xx_context.flush = 1;
       counter = FLUSH_COUNT_READ_WRITE;
 	}
     retval = dsp5680xx_write_32_single(target,address+(iter<<1),data[iter], pmem);
     if(retval != ERROR_OK){
       LOG_ERROR("%s: Could not write to p:0x%04X",__FUNCTION__,address);
-	  context.flush = 1;
+	  dsp5680xx_context.flush = 1;
       return retval;
     }
-	context.flush = 0;
+	dsp5680xx_context.flush = 0;
   }
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   return retval;
 }
 
@@ -1104,7 +1107,7 @@ static int dsp5680xx_f_execute_command(struct target * target, uint16_t command,
     }
   }while (!(i&0x40));				// wait until current command is complete
 
-  context.flush = 0;
+  dsp5680xx_context.flush = 0;
 
   retval = eonce_move_value_at_r2_disp(target,0x00,HFM_CNFG);	// write to HFM_CNFG (lock=0, select bank) -- flash_desc.bank&0x03,0x01 == 0x00,0x01 ???
   err_check_propagate(retval);
@@ -1134,7 +1137,7 @@ static int dsp5680xx_f_execute_command(struct target * target, uint16_t command,
   retval = eonce_move_value_at_r2_disp(target,0x80,HFM_USTAT);		// start the command
   err_check_propagate(retval);
 
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   retval = dsp5680xx_execute_queue();
   err_check_propagate(retval);
 
@@ -1371,7 +1374,7 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
   // Setup registers needed by pgm_write_pflash
   // -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
 
-  context.flush = 0;
+  dsp5680xx_context.flush = 0;
 
   retval = eonce_move_long_to_r3(target,address);  // Destination address to r3
   err_check_propagate(retval);
@@ -1400,7 +1403,7 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
 	err_check(retval,"Cannot handle odd number of words.");
   }
 
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   retval = dsp5680xx_execute_queue();
   err_check_propagate(retval);
 
@@ -1412,21 +1415,21 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
   err_check_propagate(retval);
 
   int counter = FLUSH_COUNT_FLASH;
-  context.flush = 0;
+  dsp5680xx_context.flush = 0;
   uint32_t i;
   for(i=1; (i<count/2)&&(i<HFM_SIZE_WORDS); i++){
     if(--counter==0){
-      context.flush = 1;
+      dsp5680xx_context.flush = 1;
       counter = FLUSH_COUNT_FLASH;
     }
     retval = eonce_tx_upper_data(target,buff16[i],&drscan_data);
 	if(retval!=ERROR_OK){
-	  context.flush = 1;
+	  dsp5680xx_context.flush = 1;
 	  err_check_propagate(retval);
 	}
-	context.flush = 0;
+	dsp5680xx_context.flush = 0;
   }
-  context.flush = 1;
+  dsp5680xx_context.flush = 1;
   // -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
   // Verify flash
   // -- -- -- -- -- -- -- -- -- -- -- -- -- -- --

src/target/dsp5680xx.h

@@ -217,7 +217,9 @@ struct dsp5680xx_common{
   //TODO
   uint32_t stored_pc;
   int flush;
-}context;
+};
+
+extern struct dsp5680xx_common dsp5680xx_context;
 
 static inline struct dsp5680xx_common *target_to_dsp5680xx(struct target *target){
   return target->arch_info;

src/target/mips_m4k.c

@@ -616,6 +616,14 @@ static int mips_m4k_unset_breakpoint(struct target *target,
 			{
 				return retval;
 			}
+
+			/**
+			 * target_read_memory() gets us data in _target_ endianess.
+			 * If we want to use this data on the host for comparisons with some macros
+			 * we must first transform it to _host_ endianess using target_buffer_get_u32().
+			 */
+			current_instr = target_buffer_get_u32(target, (uint8_t *)&current_instr);
+
 			if (current_instr == MIPS32_SDBBP)
 			{
 				if ((retval = target_write_memory(target, breakpoint->address, 4, 1,
@@ -877,11 +885,11 @@ static int mips_m4k_read_memory(struct target *target, uint32_t address,
 		switch(size)
 		{
 		case 4:
-			t32 = *(uint32_t*)&buffer[i];
+			t32 = le_to_h_u32(&buffer[i]);
 			target_buffer_set_u32(target,&buffer[i], t32);
 			break;
 		case 2:
-			t16 = *(uint16_t*)&buffer[i];
+			t16 = le_to_h_u16(&buffer[i]);
 			target_buffer_set_u16(target,&buffer[i], t16);
 			break;
 		}
@@ -930,11 +938,11 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address,
 		{
 		case 4:
 			t32 = target_buffer_get_u32(target,&buffer[i]);
-			*(uint32_t*)&t[i] = t32;
+			h_u32_to_le(&t[i], t32);
 			break;
 		case 2:
 			t16 = target_buffer_get_u16(target,&buffer[i]);
-			*(uint16_t*)&t[i] = t16;
+			h_u16_to_le(&t[i], t16);
 			break;
 		}
 	}
@@ -1074,7 +1082,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
 	for(i = 0; i < (count*4); i += 4)
 	{
 		t32 = target_buffer_get_u32(target,&buffer[i]);
-		*(uint32_t*)&t[i] = t32;
+		h_u32_to_le(&t[i], t32);
 	}
 	
 	retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address,

src/target/target.c

@@ -81,7 +81,7 @@ extern struct target_type arm11_target;
 extern struct target_type mips_m4k_target;
 extern struct target_type avr_target;
 extern struct target_type dsp563xx_target;
-extern struct target_type dsp5680xx_target;
+//extern struct target_type dsp5680xx_target;
 extern struct target_type testee_target;
 extern struct target_type avr32_ap7k_target;
 
@@ -104,7 +104,8 @@ static struct target_type *target_types[] =
 	&mips_m4k_target,
 	&avr_target,
 	&dsp563xx_target,
-	&dsp5680xx_target,
+// Disabled for now, it generates warnings
+//	&dsp5680xx_target,
 	&testee_target,
 	&avr32_ap7k_target,
 	NULL,