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RV64_DYNAREC] Added more avx scalar opcodes (#3029)

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This commit is contained in:
Yang Liu
2025-09-22 22:35:23 +08:00
committed by GitHub
parent c605e4630e
commit 3dfd5bf4b0
3 changed files with 58 additions and 2 deletions
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4
src/dynarec/rv64/dynarec_rv64_660f.c
View File

@@ -414,11 +414,11 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
// GX->f[0] = EX->d[0];
FLD(d0, wback, fixedaddress + 0);
FCVTSD(d0, d0);
FSD(d0, gback, gdoffset + 0);
FSW(d0, gback, gdoffset + 0);
// GX->f[1] = EX->d[1];
FLD(d0, wback, fixedaddress + 8);
FCVTSD(d0, d0);
FSD(d0, gback, gdoffset + 4);
FSW(d0, gback, gdoffset + 4);
// GX->q[1] = 0;
SD(xZR, gback, gdoffset + 8);
break;

39
src/dynarec/rv64/dynarec_rv64_avx_66_0f.c
View File

@@ -513,6 +513,31 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
} else
YMM0(gd);
break;
case 0x5A:
INST_NAME("VCVTPD2PS Gx, Ex");
nextop = F8;
GETEX(x2, 0, vex.l ? 24 : 8);
GETGX();
d0 = fpu_get_scratch(dyn);
d1 = fpu_get_scratch(dyn);
FLD(d0, wback, fixedaddress + 0);
FLD(d1, wback, fixedaddress + 8);
FCVTSD(d0, d0);
FCVTSD(d1, d1);
FSW(d0, gback, gdoffset + 0);
FSW(d1, gback, gdoffset + 4);
if (vex.l) {
GETEY();
FLD(d0, wback, fixedaddress + 0);
FLD(d1, wback, fixedaddress + 8);
FCVTSD(d0, d0);
FCVTSD(d1, d1);
FSW(d0, gback, gdoffset + 8);
FSW(d1, gback, gdoffset + 12);
} else
SD(xZR, gback, gdoffset + 8);
YMM0(gd);
break;
case 0x5B:
INST_NAME("VCVTPS2DQ Gx, Ex");
nextop = F8;
@@ -1850,6 +1875,20 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
} else
YMM0(gd);
break;
case 0xD6:
INST_NAME("VMOVQ Ex, Gx");
nextop = F8;
GETEX(x2, 0, 8);
GETGX();
LD(x3, gback, gdoffset);
SD(x3, wback, fixedaddress);
if (MODREG) {
SD(xZR, wback, fixedaddress + 8);
YMM0(ed);
} else {
SMWRITE2();
}
break;
case 0xD8:
INST_NAME("VPSUBUSB Gx, Vx, Ex");
nextop = F8;

17
src/dynarec/rv64/dynarec_rv64_avx_f2_0f.c
View File

@@ -78,6 +78,23 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
YMM0(ed);
}
break;
case 0x12:
INST_NAME("VMOVDDUP Gx, Ex");
nextop = F8;
GETEX(x1, 0, 1);
GETGX();
GETGY();
LD(x3, wback, fixedaddress);
SD(x3, gback, gdoffset);
SD(x3, gback, gdoffset + 8);
if (vex.l) {
GETEY();
LD(x3, wback, fixedaddress + 0);
SD(x3, gback, gyoffset + 0);
SD(x3, gback, gyoffset + 8);
} else
YMM0(gd);
break;
case 0x58:
INST_NAME("VADDSD Gx, Vx, Ex");
nextop = F8;