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Author SHA1 Message Date
Yang Liu
eff93582a7 [LA64_DYNAREC] Fixed AVX VMASKMOVDQU opcode (#2918) 2025-08-07 23:23:33 +02:00
Yang Liu
1535907f2d [LA64_DYNAREC] Fixed AVX VPBLENDW opcodes (#2917) 2025-08-07 23:21:52 +02:00
Yang Liu
9eb1642ec8 [LA64_DYNAREC] Fixed AVX VMOVMSKPS/VMOVMSKPD opcodes (#2916) 2025-08-07 23:20:23 +02:00
Yang Liu
c85072e4d3 [LA64_DYNAREC] Fixed AVX VMOVSS opcode (#2915) 2025-08-07 23:19:28 +02:00
Yang Liu
e1b6976528 [LA64_DYNAREC] Fixed AVX VCMPSS/VCMPSD opcodes (#2914) 2025-08-07 23:18:32 +02:00
Yang Liu
a9aff45bf2 [LA64_DYNAREC] Fixed some AVX scalar MIN/MAX opcodes (#2913) 2025-08-07 23:17:30 +02:00
Yang Liu
c59b9f2686 [LA64_DYNAREC] Refined F3 0F 5D/5F MINSS/MAXSS opcodes (#2912) 2025-08-07 23:15:47 +02:00
Yang Liu
98431d8cf5 [BOX32] Enlarge xcb connects size for Linux Steam (#2910) 2025-08-07 12:35:42 +02:00
Yang Liu
a083025565 [ARM64_DYNAREC] Fixed AVX VMOVMSKPD opcode (#2909) 2025-08-06 17:26:57 +02:00
Yang Liu
309dad99b4 [ARM64_DYNAREC] Fixed AVX VMOVSS opcode (#2908) 2025-08-06 17:23:40 +02:00
Yang Liu
c2c5d3b836 [ARM64_DYNAREC][INTERP] Fixed AVX VPERM2F128/VPERM2I128 opcodes (#2907) 2025-08-06 17:22:32 +02:00
Yang Liu
87baa884d2 [LA64_DYNAREC] Fixed 66 0F 3A 16 PEXTRD opcode (#2906) 2025-08-06 10:42:50 +02:00
Yang Liu
442d6a262b [LA64_DYNAREC] Fixed 66 F3 0F B8 POPCNT opcode (#2905) 2025-08-06 10:41:22 +02:00
Yang Liu
47dbadb4d4 [RV64_DYNAREC] Added 1 more opcode (#2903) 2025-08-06 10:35:17 +02:00
Yang Liu
676efe4032 [LA64_DYNAREC] Added more opcodes (#2902) 2025-08-06 10:34:37 +02:00
Chi-Kuan Chiu
dd7b99ffd1 Add O(1) early-out to eusing cached bounds (#2901) 
Add a fast-path in rb_get() and rb_get_64() that checks the tree’s
cached leftmost->start and rightmost->end bounds before calling
find_addr(). If the query address lies outside the address bounds,
we return 0 immediately, avoiding an unnecessary tree walk.

This mirrors the idea used in jserv/rbtree’s rb_cached_contains(),
using cached min/max to short-circuit lookups.

Behavior is unchanged (both functions still return 0 when not found);
only negative lookups become cheaper.

Co-authored-by: Jim Huang <jserv@ccns.ncku.edu.tw>
 2025-08-05 23:43:12 +02:00
Leslie Zhai
f82c5440b7 [WRAPPER] Wrapped g_thread_pool some functions (#2900) 2025-08-05 14:33:45 +02:00
ptitSeb
c9d5e8bfc3 [RCFILE] Added 1 more game profile 2025-08-05 13:52:52 +02:00
Leslie Zhai
7e5598d0db [WRAPPER] Wrapped g_async_queue_new_full, g_async_queue_push_sorted, (#2899) 
g_thread_pool_free, g_thread_pool_new and g_thread_pool_push
 2025-08-05 12:01:52 +02:00
Max Parry
9d5b2f3cc5 [DOCS] Fix typo in link (#2898) 
1-byte change, I know, I know.
 2025-08-05 10:24:39 +02:00
Leslie Zhai
1eba5b1af6 [WRAPPER] Wrapped g_object_add_toggle_ref, g_object_remove_toggle_ref (#2897) 
and g_object_weak_unref
 2025-08-05 10:23:49 +02:00
Leslie Zhai
daeff6fc41 [WRAPPER] Wrapped g_type_module_use, g_type_module_register_type and g_type_module_add_interface (#2895) 
* [WRAPPER] Wrapped g_type_module_use, g_type_module_register_type and g_type_module_add_interface

* [WRAPPER] Removed duplicated my_GInterfaceInfo_t
 2025-08-05 08:22:01 +02:00
Yang Liu
368f14b4ce [LA64_DYNAREC] Fixed F3 0F 53 RCPSS opcode (#2892) 2025-08-04 14:35:32 +02:00
Yang Liu
f480ae4459 [LA64_DYNAREC] Fixed 66 0F 3A 0F PALIGNR for case where dst==src (#2894) 2025-08-04 14:35:04 +02:00
Yang Liu
bfb2d14fee [LA64_DYNAREC] Fixed 66 0F 38 06 PHSUBD opcode (#2893) 2025-08-04 14:34:12 +02:00
Yang Liu
bef83b6c03 [LA64_DYNAREC] Fixed 66 0F 3A 21 INSERTPS opcode (#2891) 2025-08-04 13:56:27 +02:00
Yang Liu
f4cd829c82 [LA64_DYNAREC] Added and optimized more fastround=0 cases (#2890) 2025-08-04 13:52:28 +02:00
ptitSeb
7b0ecf9f6c [STEAM] Added PROTON_USE_WOW64 to the script generated by install_steam.sh 2025-08-04 13:28:52 +02:00
phorcys
c769330d92 [LA64_DYNAREC] Fix some la64 ops. (#2889) 
Fix 0F.BA./7 BTS CF when cpuext.lbt == 1
Fix 66.0F.CF BSWAP 16bits ops.
Fix VEXTRACTF128, VINSERTF128
 2025-08-04 13:24:50 +02:00
Yang Liu
afe466b051 [LA64_DYNAREC] Fixed 66 0F 38 14 BLENDVPS opcode (#2888) 2025-08-04 11:28:11 +02:00
Yang Liu
4bb4e45836 [LA64_DYNAREC] Fixed 66 0F 3A 0C/0D BLENDPS/D opcodes (#2887) 2025-08-04 11:27:17 +02:00
Yang Liu
cbd1f487c7 [LA64_DYNAREC] Fixed a few GETEX usage (#2886) 2025-08-04 10:52:23 +02:00
Yang Liu
926176c1b5 [LA64_DYNAREC] Fixed 0F E2 PSRAD opcode (#2885) 2025-08-04 10:48:37 +02:00
Yang Liu
aac7345603 [LA64_DYNAREC] Fixed 0F E3 PAVGW opcode (#2884) 2025-08-04 10:48:04 +02:00
phorcys
0dc9f8cb62 [LA64_DYNAREC] Add la64 avx bit ops. (#2873) 
*  VEX.66.0F.3A VPEXTRB/VPEXTRW/VPEXTRD/VPEXTRQ VPINSRB/VPINSRD/VPINSRQ
  *  VEX.66.0F.C5 VPEXTRW
  *  VEX.66.0f.C4 VPINSRW
  *  VEX.66.0F.38.41 VPHMINPOSUW
 2025-08-04 08:57:32 +02:00
phorcys
cb0b274c27 [LA64_DYNAREC] Fix some la64 avx/sse ops. (#2882) 
Fix 66.0F.F3 PSLLQ
Fix VEX.66.0F.7E VMOVD not zero-extend
Fix Vex.66.0F.3A.06 VPERM2F128/VPERM2I128
Fix Vex.66.0F.3A.0D VBLENDPD
Fix VEX.66.0F.3A.18/38 VINSERTF128/VINSERTI128  when q0 == q1 or q0 == q2
Fix VEX.66.0F.3A.21 VINSERTPS fix u8 get pos
Fix VEX.66.0F.3A.40 VDPPS Fix VREPLVEIxy emit when vex.l
Fix VEX.66.0F.38.0C VPERMILPS
Fix VEX.66.0F.38.2B VPACKUSDW
Fix VEX.66.0F.38.93 VGATHERQPD
 2025-08-02 14:42:05 +02:00
Yang Liu
ebac583441 [RV64_DYNAREC] Fixed scalar version of 66 0F 3A 21 INSERTPS opcode (#2881) 2025-08-02 12:48:38 +02:00
Yang Liu
6221b01976 [RV64_DYNAREC] Fixed scalar and vector versions of mmx PSRAW/PSRAD (#2880) 2025-08-02 12:47:30 +02:00
Yang Liu
caac35cc1e [RV64_DYNAREC] Fixed some mmx opcodes (#2879) 2025-08-02 12:00:04 +02:00
Yang Liu
f7302ecb1b [ARM64_DYNAREC] Fixed PCMPESTRI fastpath SF flag computation (#2876) 2025-08-01 19:44:02 +02:00
Yang Liu
4c30838448 [INTERP] Fixed 16bit version POPCNT (#2877) 2025-08-01 19:30:45 +02:00
Yang Liu
ded60bbabd [ARM64_DYNAREC] Fixed a typo (#2875) 2025-08-01 15:59:33 +02:00
Yang Liu
c2805b0f9b [ARM64_DYNAREC] Fixed some edge cases for mmx PSRLQ (#2874) 2025-08-01 12:55:55 +02:00
phorcys
7e9775de94 [LA64_DYNAREC] Add la64 avx cvt ops, part 3. (#2869) 
Double <=> Integer convert.
Half Float <=> Integer convert.
VCVT{DQ2PD, PD2DQ, TPD2DQ}
VCVT{SI2SD, SD2SI, TSD2SI}
VCVT{PH2PS, PS2PH}
 2025-08-01 11:49:29 +02:00
Yang Liu
ae0ac5a1d0 [INTERP] Added 66 F0 0F BA BTS opcode (#2872) 2025-08-01 11:48:02 +02:00
Yang Liu
ea804a5261 [TRACE] Minor improvements to trace logging (#2871) 2025-08-01 11:46:49 +02:00
ptitSeb
a17811f4a6 [INTERP] Try to improve aligned LOCK CMPXCHG8B opcode 2025-08-01 11:12:43 +02:00
ptitSeb
d2c77ddb01 [RCFIEL] Improved a profile 2025-08-01 11:12:15 +02:00
Yang Liu
6c438a5e65 [WRAPPED] Wrapped more functions for libc (#2870) 
* [WRAPPED] Wrapped more functions for libc

* review
 2025-08-01 11:11:26 +02:00
phorcys
6da5698c02 [LA64_DYNAREC] Add la64 avx cvt ops, part2. (#2866) 
Integer <=> Float convert.
VCVT{DQ2PS, PS2DQ, TPS2DQ}
VCVT{SI2SS, SS2SI, TSS2SI}
 2025-08-01 08:17:23 +02:00