riscv-software-src/riscv-isa-sim
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Need zero extend for sspopchk compared vale

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* when xlen is 32
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Binno
2024-08-20 01:03:05 -07:00
parent 3c61a0f41e
commit 060bbd6308
1 changed files with 1 additions and 1 deletions
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riscv/zicfiss.h
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@@ -25,7 +25,7 @@
shadow_return_addr = MMU.ss_load<uint32_t>(STATE.ssp->read()); \
else \
shadow_return_addr = MMU.ss_load<uint64_t>(STATE.ssp->read()); \
software_check(value == shadow_return_addr, SHADOW_STACK_FAULT); \
software_check(zext_xlen(value) == shadow_return_addr, SHADOW_STACK_FAULT); \
STATE.ssp->write(STATE.ssp->read() + xlen / 8);
#endif