This adds some information about loading the RPU TCMs from A53 u-boot
and additional information about debugging the RPU within QEMU since it
is non-standard.
Change the development suggestion for booting the R5 since the R5 u-boot
is only minimally functional without significant development. This also
adds caveats when booting the R5 cores from the A53.
Add information about the new i.MXRT1166 BSP. Rework some parts that
have been changed during or as preparation for that variant:
* The BSP now adapts to the Chip variant. It's no longer necessary to
overwrite the PLL settings in an application.
* Improve documentation on how to adapt to different boards.
* Add Update the i.MXRT chapter so that it represents the new i.MXRT1166
BSP.
* Add information about mcux-sdk and how to handle it.
This patch adds the documentation for building and running RTEMS on the Kendryte K210 RISC-V SoC.
The generic riscv introducion was re-arranged to list the multilib variants then the specific
hardware targets. In addition a couple of errors were fixed for the generic QEMU commands.
V2 corrected a typo, expanded K210 Console UART parameters, and addded a hyperlink to renode.io install
instructions.
V3 clarified the multilib variant description, clarified the multilib variant reference platform, and
corrected capitalization on SiFive.
V4 improves the instructions for running the K210 BSP on the Renode.io simulator.
V5 cleaned up the text to be no more than 80 characters per line.
V6 applied word wrap to paragraphs and replaced hard coded RTEMS major versions with macros.
Closes#4876
This patch adds the documentation for building and running RTEMS on the Kendryte K210
RISC-V SoC. The generic riscv introducion was re-arranged to list the multilib variants
then the specific hardware targets. In addition a couple of errors were fixed for the
generic QEMU commands.
V2 corrected a typo, expanded K210 Console UART parameters, and addded a hyperlink
to renode.io install instructions.
Closes#4876
The BSP is capable of initialising the hardware being the first software
that takes control on hardware reset (after the bootrom). For instance,
using on QEMU's virt platforms, RTEMS runs as a bios without BBL.
Similarily, RTEMS can also be run on harware/FPGA and loaded using
GDB; the bootrom (or a GDB script) should just set the a0/a1 registers
with the boot HART ID and DTB address respectively.
Update the riscv documentation for the Microchip PolarFire SoC
BSP variant including information about SMP test procedure
for the Microchip PolarFire Icicle Kit.
This patch adds the relevant documentations required for booting the new BSP.
JTAG support is added for debugging. I have built the HTML docs and verified
them.
This patch adds kind of HOWTO to the stm32h7 BSP description. The howto
discusses various tools from STM tool-chain and how to use them in order
to configure board for RTEMS and to upload RTEMS application binary
to the board. The patch also adds more supported boards to the table.
Sponsored-By: Precidata
This patch is for the rtems-docs repo. I added details on the procedure I
used to boot RTEMS images on the Xilinx ZCU102 board. I applied this patch,
and generated the HTML docs, and everything looks ok to me.
The device tree has to be aligned correctly. rtems-bin2c has a new
parameter for that. This patch uses this parameter to generate the right
alignment and makes it more clear how to use the generated C file.
