rtems/rtems-libbsd
1
0
Fork 0
mirror of https://git.rtems.org/rtems-libbsd/ synced 2025-07-23 12:10:26 +08:00
Code Issues Packages Projects Releases Wiki Activity

sys/dev/mii/mii_bitbang.c: Add from FreeBSD

Browse Source
This commit is contained in:
Sebastian Huber 2013-11-06 08:27:39 +01:00
parent 3fd1b1e807
commit 94d04f8ba8
3 changed files with 184 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -409,6 +409,7 @@ LIB_C_FILES += freebsd/sys/contrib/pf/net/pf_norm.c
LIB_C_FILES += freebsd/sys/contrib/pf/net/pf_ruleset.c
LIB_C_FILES += freebsd/sys/contrib/pf/net/if_pfsync.c
LIB_C_FILES += freebsd/sys/dev/mii/mii.c
LIB_C_FILES += freebsd/sys/dev/mii/mii_bitbang.c
LIB_C_FILES += freebsd/sys/dev/mii/mii_physubr.c
LIB_C_FILES += freebsd/sys/dev/mii/icsphy.c
LIB_C_FILES += freebsd/sys/dev/mii/brgphy.c

1
freebsd-to-rtems.py
View File

@ -1166,6 +1166,7 @@ devNet.addHeaderFiles(
devNet.addSourceFiles(
[
'sys/dev/mii/mii.c',
'sys/dev/mii/mii_bitbang.c',
'sys/dev/mii/mii_physubr.c',
'sys/dev/mii/icsphy.c',
'sys/dev/mii/brgphy.c',

182
freebsd/sys/dev/mii/mii_bitbang.c Normal file
View File

@ -0,0 +1,182 @@
#include <machine/rtems-bsd-config.h>
/* $NetBSD: mii_bitbang.c,v 1.12 2008/05/04 17:06:09 xtraeme Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following didevlaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following didevlaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Common module for bit-bang'ing the MII.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <rtems/bsd/sys/param.h>
#include <sys/systm.h>
#include <sys/module.h>
#include <dev/mii/mii.h>
#include <dev/mii/mii_bitbang.h>
MODULE_VERSION(mii_bitbang, 1);
static void mii_bitbang_sendbits(device_t dev, mii_bitbang_ops_t ops,
uint32_t data, int nbits);
#define MWRITE(x) \
do { \
ops->mbo_write(dev, (x)); \
DELAY(1); \
} while (/* CONSTCOND */ 0)
#define MREAD ops->mbo_read(dev)
#define MDO ops->mbo_bits[MII_BIT_MDO]
#define MDI ops->mbo_bits[MII_BIT_MDI]
#define MDC ops->mbo_bits[MII_BIT_MDC]
#define MDIRPHY ops->mbo_bits[MII_BIT_DIR_HOST_PHY]
#define MDIRHOST ops->mbo_bits[MII_BIT_DIR_PHY_HOST]
/*
* mii_bitbang_sync:
*
* Synchronize the MII.
*/
void
mii_bitbang_sync(device_t dev, mii_bitbang_ops_t ops)
{
int i;
uint32_t v;
v = MDIRPHY | MDO;
MWRITE(v);
for (i = 0; i < 32; i++) {
MWRITE(v | MDC);
MWRITE(v);
}
}
/*
* mii_bitbang_sendbits:
*
* Send a series of bits to the MII.
*/
static void
mii_bitbang_sendbits(device_t dev, mii_bitbang_ops_t ops, uint32_t data,
int nbits)
{
int i;
uint32_t v;
v = MDIRPHY;
MWRITE(v);
for (i = 1 << (nbits - 1); i != 0; i >>= 1) {
if (data & i)
v |= MDO;
else
v &= ~MDO;
MWRITE(v);
MWRITE(v | MDC);
MWRITE(v);
}
}
/*
* mii_bitbang_readreg:
*
* Read a PHY register by bit-bang'ing the MII.
*/
int
mii_bitbang_readreg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg)
{
int i, error, val;
mii_bitbang_sync(dev, ops);
mii_bitbang_sendbits(dev, ops, MII_COMMAND_START, 2);
mii_bitbang_sendbits(dev, ops, MII_COMMAND_READ, 2);
mii_bitbang_sendbits(dev, ops, phy, 5);
mii_bitbang_sendbits(dev, ops, reg, 5);
/* Switch direction to PHY->host, without a clock transition. */
MWRITE(MDIRHOST);
/* Turnaround clock. */
MWRITE(MDIRHOST | MDC);
MWRITE(MDIRHOST);
/* Check for error. */
error = MREAD & MDI;
/* Idle clock. */
MWRITE(MDIRHOST | MDC);
MWRITE(MDIRHOST);
val = 0;
for (i = 0; i < 16; i++) {
val <<= 1;
/* Read data prior to clock low-high transition. */
if (error == 0 && (MREAD & MDI) != 0)
val |= 1;
MWRITE(MDIRHOST | MDC);
MWRITE(MDIRHOST);
}
/* Set direction to host->PHY, without a clock transition. */
MWRITE(MDIRPHY);
return (error != 0 ? 0 : val);
}
/*
* mii_bitbang_writereg:
*
* Write a PHY register by bit-bang'ing the MII.
*/
void
mii_bitbang_writereg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg,
int val)
{
mii_bitbang_sync(dev, ops);
mii_bitbang_sendbits(dev, ops, MII_COMMAND_START, 2);
mii_bitbang_sendbits(dev, ops, MII_COMMAND_WRITE, 2);
mii_bitbang_sendbits(dev, ops, phy, 5);
mii_bitbang_sendbits(dev, ops, reg, 5);
mii_bitbang_sendbits(dev, ops, MII_COMMAND_ACK, 2);
mii_bitbang_sendbits(dev, ops, val, 16);
MWRITE(MDIRPHY);
}