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rtemsbsd/arasan_sdhci: Remove redundant clock cap

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The BSD SD subsystem enforces a 50MHz clock cap for devices which don't
report their own maximum clock speed. This setting is unnecessary for
the Zynq 7000 version of this IP and restricts the Zynq Ultrascale+
MPSoC version of this IP without need since it reports its maximum speed
as 200MHz.
This commit is contained in:
Kinsey Moore
2022-09-26 15:59:38 -05:00
committed by Joel Sherrill
parent 452637ae99
commit cf8fa08015
1 changed files with 0 additions and 2 deletions
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rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
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@@ -284,8 +284,6 @@ arasan_sdhci_attach(device_t dev)
*/
sc->slot.quirks |= SDHCI_QUIRK_BROKEN_DMA;
sc->slot.max_clk = 50000000;
sdhci_init_slot(dev, &sc->slot, 0);
sc->slot_init_done = true;