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Build standalone sis for SPARC and RISC-V targets

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This commit is contained in:
Jiri Gaisler 2019-06-14 23:43:43 +02:00
parent 8156748bd2
commit 9e8e023d01
2 changed files with 3 additions and 0 deletions
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1
rtems/config/5/rtems-riscv.bset
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@ -15,3 +15,4 @@ tools/rtems-binutils-2.32
tools/rtems-gcc-9.1.0-newlib-5c2a3661c
tools/rtems-tools-5-1
tools/rtems-kernel-5
devel/sis-2-1.cfg

2
rtems/config/5/rtems-sparc.bset
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@ -2,3 +2,5 @@
%define rtems_arch sparc
%define with_libgomp
%include 5/rtems-default.bset
devel/sis-2-1.cfg