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update(port/ohci): add pad for ed&td cachemaintain, add CONFIG_USB_OHCI_DESC_DCACHE_ENABLE for ed&td

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Signed-off-by: sakumisu <1203593632@qq.com>
This commit is contained in:
sakumisu 2025-03-28 13:13:24 +08:00
parent e9257baa5d
commit 5666fcb540
2 changed files with 20 additions and 1 deletions
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4
cherryusb_config_template.h
View File

@ -271,9 +271,13 @@
// #define CONFIG_USB_EHCI_CONFIGFLAG
// #define CONFIG_USB_EHCI_ISO
// #define CONFIG_USB_EHCI_WITH_OHCI
// #define CONFIG_USB_EHCI_DESC_DCACHE_ENABLE
/* ---------------- OHCI Configuration ---------------- */
#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)
#define CONFIG_USB_OHCI_ED_NUM CONFIG_USBHOST_PIPE_NUM
#define CONFIG_USB_OHCI_TD_NUM 3
// #define CONFIG_USB_OHCI_DESC_DCACHE_ENABLE
/* ---------------- XHCI Configuration ---------------- */
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)

17
port/ohci/usb_hc_ohci.h
View File

@ -22,13 +22,23 @@
#ifndef CONFIG_USB_OHCI_TD_NUM
#define CONFIG_USB_OHCI_TD_NUM 3
#endif
#ifndef CONFIG_USB_OHCI_ALIGN_SIZE
#if CONFIG_USB_ALIGN_SIZE <= 32
#define CONFIG_USB_OHCI_ALIGN_SIZE 32
#elif CONFIG_USB_ALIGN_SIZE <= 64
#define CONFIG_USB_OHCI_ALIGN_SIZE 64
#else
#error "CONFIG_USB_ALIGN_SIZE must be 32 or 64"
#endif
struct ohci_ed_hw;
struct ohci_td_hw {
struct ohci_gtd hw;
#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32)
uint8_t pad[16];
#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64)
uint8_t pad[48];
#endif
struct usbh_urb *urb;
bool dir_in;
uint32_t buf_start;
@ -37,6 +47,11 @@ struct ohci_td_hw {
struct ohci_ed_hw {
struct ohci_ed hw;
#if defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 32)
uint8_t pad[16];
#elif defined(CONFIG_USB_OHCI_DESC_DCACHE_ENABLE) && (CONFIG_USB_ALIGN_SIZE == 64)
uint8_t pad[48];
#endif
struct ohci_td_hw td_pool[CONFIG_USB_OHCI_TD_NUM];
uint32_t td_count;
uint8_t ed_type;