mirror of
https://github.com/sakumisu/CherryUSB.git
synced 2025-05-08 07:59:31 +08:00
1444 lines
44 KiB
C
1444 lines
44 KiB
C
/*
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* Copyright (c) 2022, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "usb_hc_ehci.h"
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#ifdef CONFIG_USB_EHCI_WITH_OHCI
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#include "usb_hc_ohci.h"
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#endif
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#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
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#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
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#define EHCI_TUNE_RL_TT 0
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#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
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#define EHCI_TUNE_MULT_TT 1
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struct ehci_hcd g_ehci_hcd[CONFIG_USBHOST_MAX_BUS];
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw ehci_qh_pool[CONFIG_USBHOST_MAX_BUS][CONFIG_USB_EHCI_QH_NUM];
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USB_NOCACHE_RAM_SECTION struct ehci_qtd_hw ehci_qtd_pool[CONFIG_USBHOST_MAX_BUS][CONFIG_USB_EHCI_QTD_NUM];
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/* The head of the asynchronous queue */
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_async_qh_head[CONFIG_USBHOST_MAX_BUS];
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/* The head of the periodic queue */
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USB_NOCACHE_RAM_SECTION struct ehci_qh_hw g_periodic_qh_head[CONFIG_USBHOST_MAX_BUS];
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/* The frame list */
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USB_NOCACHE_RAM_SECTION uint32_t g_framelist[CONFIG_USBHOST_MAX_BUS][USB_ALIGN_UP(CONFIG_USB_EHCI_FRAME_LIST_SIZE, 1024)] __attribute__((aligned(4096)));
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static struct ehci_qtd_hw *ehci_qtd_alloc(struct usbh_bus *bus)
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{
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struct ehci_qtd_hw *qtd;
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size_t flags;
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flags = usb_osal_enter_critical_section();
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QTD_NUM; i++) {
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qtd = &ehci_qtd_pool[bus->hcd.hcd_id][i];
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if (!qtd->inuse) {
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qtd->inuse = true;
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usb_osal_leave_critical_section(flags);
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memset(&qtd->hw, 0, sizeof(struct ehci_qtd));
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qtd->hw.next_qtd = QTD_LIST_END;
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qtd->urb = NULL;
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qtd->bufaddr = 0;
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qtd->length = 0;
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return qtd;
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}
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}
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usb_osal_leave_critical_section(flags);
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return NULL;
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}
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static void ehci_qtd_free(struct usbh_bus *bus, struct ehci_qtd_hw *qtd)
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{
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size_t flags;
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flags = usb_osal_enter_critical_section();
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qtd->inuse = false;
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qtd->urb = NULL;
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usb_osal_leave_critical_section(flags);
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}
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static struct ehci_qh_hw *ehci_qh_alloc(struct usbh_bus *bus)
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{
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struct ehci_qh_hw *qh;
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size_t flags;
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flags = usb_osal_enter_critical_section();
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for (uint32_t i = 0; i < CONFIG_USB_EHCI_QH_NUM; i++) {
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qh = &ehci_qh_pool[bus->hcd.hcd_id][i];
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if (!qh->inuse) {
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qh->inuse = true;
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usb_osal_leave_critical_section(flags);
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memset(&qh->hw, 0, sizeof(struct ehci_qh));
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qh->hw.hlp = QTD_LIST_END;
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qh->hw.overlay.next_qtd = QTD_LIST_END;
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qh->hw.overlay.alt_next_qtd = QTD_LIST_END;
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qh->urb = NULL;
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qh->first_qtd = QTD_LIST_END;
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qh->remove_in_iaad = 0;
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return qh;
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}
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}
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usb_osal_leave_critical_section(flags);
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return NULL;
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}
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static void ehci_qh_free(struct usbh_bus *bus, struct ehci_qh_hw *qh)
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{
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struct ehci_qtd_hw *qtd;
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size_t flags;
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flags = usb_osal_enter_critical_section();
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qtd = EHCI_ADDR2QTD(qh->first_qtd);
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while (qtd) {
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ehci_qtd_free(bus, qtd);
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qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd);
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}
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qh->inuse = false;
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qh->first_qtd = QTD_LIST_END;
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usb_osal_leave_critical_section(flags);
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}
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#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE)
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static inline void usb_ehci_qh_qtd_flush(struct ehci_qh_hw *qh)
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{
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struct ehci_qtd_hw *qtd;
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qtd = EHCI_ADDR2QTD(qh->first_qtd);
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while (qtd) {
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usb_dcache_clean((uintptr_t)&qtd->hw, CONFIG_USB_EHCI_ALIGN_SIZE);
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qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd);
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}
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usb_dcache_clean((uintptr_t)&qh->hw, CONFIG_USB_EHCI_ALIGN_SIZE);
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}
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#else
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#define usb_ehci_qh_qtd_flush(qh)
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#endif
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static inline void ehci_qh_add_head(struct ehci_qh_hw *head, struct ehci_qh_hw *n)
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{
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n->hw.hlp = head->hw.hlp;
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usb_ehci_qh_qtd_flush(n);
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usb_dcache_flush((uintptr_t)n->urb->transfer_buffer, USB_ALIGN_UP(n->urb->transfer_buffer_length, CONFIG_USB_ALIGN_SIZE));
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head->hw.hlp = QH_HLP_QH(n);
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#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE)
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usb_dcache_clean((uintptr_t)&head->hw, CONFIG_USB_EHCI_ALIGN_SIZE);
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#endif
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}
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static inline void ehci_qh_remove(struct ehci_qh_hw *head, struct ehci_qh_hw *n)
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{
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struct ehci_qh_hw *tmp = head;
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while (EHCI_ADDR2QH(tmp->hw.hlp) && EHCI_ADDR2QH(tmp->hw.hlp) != n) {
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tmp = EHCI_ADDR2QH(tmp->hw.hlp);
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}
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if (tmp) {
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tmp->hw.hlp = n->hw.hlp;
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#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE)
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usb_dcache_clean((uintptr_t)&tmp->hw, CONFIG_USB_EHCI_ALIGN_SIZE);
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#endif
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}
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}
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static int ehci_caculate_smask(int binterval)
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{
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int order, interval;
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interval = 1;
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while (binterval > 1) {
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interval *= 2;
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binterval--;
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}
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if (interval < 2) /* interval 1 */
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return 0xFF;
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if (interval < 4) /* interval 2 */
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return 0x55;
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if (interval < 8) /* interval 4 */
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return 0x22;
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for (order = 0; (interval > 1); order++) {
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interval >>= 1;
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}
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return (0x1 << (order % 8));
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}
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static void ehci_qh_fill(struct ehci_qh_hw *qh,
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uint8_t dev_addr,
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uint8_t ep_addr,
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uint8_t ep_type,
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uint16_t ep_mps,
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uint8_t ep_mult,
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uint8_t ep_interval,
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uint8_t speed,
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uint8_t hubaddr,
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uint8_t hubport)
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{
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uint32_t epchar = 0;
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uint32_t epcap = 0;
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/* QH endpoint characteristics:
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* DEVADDR Device address
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* I Inactivate on Next Transaction
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* ENDPT Endpoint number
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* EPS Endpoint speed
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* DTC Data toggle control
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* MAXPKT Max packet size
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* C Control endpoint
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* RL NAK count reloaded
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*/
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/* QH endpoint capabilities
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* SSMASK Interrupt Schedule Mask
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* SCMASK Split Completion Mask
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* HUBADDR Hub Address
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* PORT Port number
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* MULT High band width multiplier
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*/
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epchar |= ((ep_addr & 0xf) << QH_EPCHAR_ENDPT_SHIFT);
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epchar |= (dev_addr << QH_EPCHAR_DEVADDR_SHIFT);
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epchar |= (ep_mps << QH_EPCHAR_MAXPKT_SHIFT);
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if (ep_type == USB_ENDPOINT_TYPE_CONTROL) {
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epchar |= QH_EPCHAR_DTC; /* toggle from qtd */
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}
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switch (speed) {
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case USB_SPEED_LOW:
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epchar |= QH_EPCHAR_EPS_LOW;
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__attribute__((fallthrough));
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case USB_SPEED_FULL:
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if (ep_type == USB_ENDPOINT_TYPE_CONTROL) {
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epchar |= QH_EPCHAR_C; /* for TT */
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}
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if (ep_type != USB_ENDPOINT_TYPE_INTERRUPT) {
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epchar |= (EHCI_TUNE_RL_TT << QH_EPCHAR_RL_SHIFT);
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}
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epcap |= QH_EPCAPS_MULT(EHCI_TUNE_MULT_TT);
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epcap |= QH_EPCAPS_HUBADDR(hubaddr);
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epcap |= QH_EPCAPS_PORT(hubport);
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if (ep_type == USB_ENDPOINT_TYPE_INTERRUPT) {
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epcap |= QH_EPCAPS_SSMASK(2);
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epcap |= QH_EPCAPS_SCMASK(0x78);
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}
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break;
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case USB_SPEED_HIGH:
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epchar |= QH_EPCHAR_EPS_HIGH;
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if (ep_type == USB_ENDPOINT_TYPE_CONTROL) {
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epchar |= (EHCI_TUNE_RL_HS << QH_EPCHAR_RL_SHIFT);
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epcap |= QH_EPCAPS_MULT(EHCI_TUNE_MULT_HS);
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} else if (ep_type == USB_ENDPOINT_TYPE_BULK) {
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epcap |= QH_EPCAPS_MULT(EHCI_TUNE_MULT_HS);
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} else {
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/* only for interrupt ep */
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epcap |= QH_EPCAPS_MULT(ep_mult);
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epcap |= ehci_caculate_smask(ep_interval);
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}
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break;
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default:
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break;
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}
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qh->hw.epchar = epchar;
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qh->hw.epcap = epcap;
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}
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static void ehci_qtd_bpl_fill(struct ehci_qtd_hw *qtd, uint32_t bufaddr, size_t buflen)
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{
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uint32_t rest;
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qtd->hw.bpl[0] = bufaddr;
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rest = 0x1000 - (bufaddr & 0xfff);
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if (buflen < rest) {
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rest = buflen;
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} else {
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bufaddr += 0x1000;
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bufaddr &= ~0x0fff;
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for (int i = 1; rest < buflen && i < 5; i++) {
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qtd->hw.bpl[i] = bufaddr;
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bufaddr += 0x1000;
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if ((rest + 0x1000) < buflen) {
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rest += 0x1000;
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} else {
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rest = buflen;
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}
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}
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}
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}
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static void ehci_qtd_fill(struct ehci_qtd_hw *qtd, uint32_t bufaddr, size_t buflen, uint32_t token)
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{
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/* qTD token
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*
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* FIELD DESCRIPTION
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* -------- -------------------------------
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* STATUS Status
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* PID PID Code
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* CERR Error Counter
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* CPAGE Current Page
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* IOC Interrupt on complete
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* NBYTES Total Bytes to Transfer
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* TOGGLE Data Toggle
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*/
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qtd->hw.token = token;
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ehci_qtd_bpl_fill(qtd, usb_phyaddr2ramaddr(bufaddr), buflen);
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qtd->bufaddr = bufaddr;
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qtd->length = buflen;
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}
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static struct ehci_qh_hw *ehci_control_urb_init(struct usbh_bus *bus, struct usbh_urb *urb, struct usb_setup_packet *setup, uint8_t *buffer, uint32_t buflen)
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{
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struct ehci_qh_hw *qh = NULL;
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struct ehci_qtd_hw *qtd_setup = NULL;
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struct ehci_qtd_hw *qtd_data = NULL;
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struct ehci_qtd_hw *qtd_status = NULL;
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uint32_t token;
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size_t flags;
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qh = ehci_qh_alloc(bus);
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if (qh == NULL) {
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return NULL;
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}
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qtd_setup = ehci_qtd_alloc(bus);
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qtd_data = ehci_qtd_alloc(bus);
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qtd_status = ehci_qtd_alloc(bus);
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USB_ASSERT_MSG(qtd_setup && qtd_data && qtd_status, "ctrl qtd alloc failed");
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ehci_qh_fill(qh,
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urb->hport->dev_addr,
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urb->ep->bEndpointAddress,
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USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes),
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USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize),
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0,
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0,
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urb->hport->speed,
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urb->hport->parent->hub_addr,
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urb->hport->port);
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/* fill setup qtd */
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token = QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_PID_SETUP |
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((uint32_t)EHCI_TUNE_CERR << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)8 << QTD_TOKEN_NBYTES_SHIFT);
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ehci_qtd_fill(qtd_setup, (uintptr_t)setup, 8, token);
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qtd_setup->urb = urb;
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/* fill data qtd */
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if (setup->wLength > 0) {
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if ((setup->bmRequestType & 0x80) == 0x80) {
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token = QTD_TOKEN_PID_IN;
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} else {
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token = QTD_TOKEN_PID_OUT;
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}
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token |= QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_PID_OUT |
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QTD_TOKEN_TOGGLE |
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((uint32_t)EHCI_TUNE_CERR << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)buflen << QTD_TOKEN_NBYTES_SHIFT);
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ehci_qtd_fill(qtd_data, (uintptr_t)buffer, buflen, token);
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qtd_data->urb = urb;
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qtd_setup->hw.next_qtd = EHCI_PTR2ADDR(qtd_data);
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qtd_data->hw.next_qtd = EHCI_PTR2ADDR(qtd_status);
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} else {
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qtd_setup->hw.next_qtd = EHCI_PTR2ADDR(qtd_status);
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}
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/* fill status qtd */
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if ((setup->bmRequestType & 0x80) == 0x80) {
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token = QTD_TOKEN_PID_OUT;
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} else {
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token = QTD_TOKEN_PID_IN;
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}
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token |= QTD_TOKEN_STATUS_ACTIVE |
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QTD_TOKEN_TOGGLE |
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QTD_TOKEN_IOC |
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((uint32_t)EHCI_TUNE_CERR << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)0 << QTD_TOKEN_NBYTES_SHIFT);
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ehci_qtd_fill(qtd_status, 0, 0, token);
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qtd_status->urb = urb;
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qtd_status->hw.next_qtd = QTD_LIST_END;
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/* update qh first qtd */
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qh->hw.curr_qtd = EHCI_PTR2ADDR(qtd_setup);
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qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(qtd_setup);
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/* record qh first qtd */
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qh->first_qtd = EHCI_PTR2ADDR(qtd_setup);
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flags = usb_osal_enter_critical_section();
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qh->urb = urb;
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urb->hcpriv = qh;
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/* add qh into async list */
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ehci_qh_add_head(&g_async_qh_head[bus->hcd.hcd_id], qh);
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EHCI_HCOR->usbcmd |= EHCI_USBCMD_ASEN;
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usb_osal_leave_critical_section(flags);
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return qh;
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}
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static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_urb *urb, uint8_t *buffer, uint32_t buflen)
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{
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struct ehci_qh_hw *qh = NULL;
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struct ehci_qtd_hw *qtd = NULL;
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struct ehci_qtd_hw *first_qtd = NULL;
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struct ehci_qtd_hw *prev_qtd = NULL;
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uint32_t xfer_len = 0;
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uint32_t token;
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size_t flags;
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qh = ehci_qh_alloc(bus);
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if (qh == NULL) {
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return NULL;
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}
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ehci_qh_fill(qh,
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urb->hport->dev_addr,
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urb->ep->bEndpointAddress,
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USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes),
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USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize),
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0,
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0,
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urb->hport->speed,
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urb->hport->parent->hub_addr,
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urb->hport->port);
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while (1) {
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qtd = ehci_qtd_alloc(bus);
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USB_ASSERT_MSG(qtd, "bulk qtd alloc failed");
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if (buflen > 0x4000) {
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xfer_len = 0x4000;
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buflen -= 0x4000;
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} else {
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xfer_len = buflen;
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buflen = 0;
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}
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if (urb->ep->bEndpointAddress & 0x80) {
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token = QTD_TOKEN_PID_IN;
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} else {
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token = QTD_TOKEN_PID_OUT;
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}
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token |= QTD_TOKEN_STATUS_ACTIVE |
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((uint32_t)EHCI_TUNE_CERR << QTD_TOKEN_CERR_SHIFT) |
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((uint32_t)xfer_len << QTD_TOKEN_NBYTES_SHIFT);
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if (buflen == 0) {
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token |= QTD_TOKEN_IOC;
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}
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ehci_qtd_fill(qtd, (uintptr_t)buffer, xfer_len, token);
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qtd->urb = urb;
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qtd->hw.next_qtd = QTD_LIST_END;
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buffer += xfer_len;
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|
|
if (prev_qtd) {
|
|
prev_qtd->hw.next_qtd = EHCI_PTR2ADDR(qtd);
|
|
} else {
|
|
first_qtd = qtd;
|
|
}
|
|
prev_qtd = qtd;
|
|
|
|
if (buflen == 0) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* update qh first qtd */
|
|
qh->hw.curr_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
/* update data toggle */
|
|
if (urb->data_toggle) {
|
|
qh->hw.overlay.token = QTD_TOKEN_TOGGLE;
|
|
} else {
|
|
qh->hw.overlay.token = 0;
|
|
}
|
|
|
|
/* record qh first qtd */
|
|
qh->first_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
qh->urb = urb;
|
|
urb->hcpriv = qh;
|
|
/* add qh into async list */
|
|
ehci_qh_add_head(&g_async_qh_head[bus->hcd.hcd_id], qh);
|
|
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_ASEN;
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
return qh;
|
|
}
|
|
|
|
static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_urb *urb, uint8_t *buffer, uint32_t buflen)
|
|
{
|
|
struct ehci_qh_hw *qh = NULL;
|
|
struct ehci_qtd_hw *qtd = NULL;
|
|
struct ehci_qtd_hw *first_qtd = NULL;
|
|
struct ehci_qtd_hw *prev_qtd = NULL;
|
|
uint32_t xfer_len = 0;
|
|
uint32_t token;
|
|
size_t flags;
|
|
|
|
qh = ehci_qh_alloc(bus);
|
|
if (qh == NULL) {
|
|
return NULL;
|
|
}
|
|
|
|
ehci_qh_fill(qh,
|
|
urb->hport->dev_addr,
|
|
urb->ep->bEndpointAddress,
|
|
USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes),
|
|
USB_GET_MAXPACKETSIZE(urb->ep->wMaxPacketSize),
|
|
USB_GET_MULT(urb->ep->wMaxPacketSize) + 1,
|
|
urb->ep->bInterval,
|
|
urb->hport->speed,
|
|
urb->hport->parent->hub_addr,
|
|
urb->hport->port);
|
|
|
|
while (1) {
|
|
qtd = ehci_qtd_alloc(bus);
|
|
USB_ASSERT_MSG(qtd, "intr qtd alloc failed");
|
|
|
|
if (buflen > 0x4000) {
|
|
xfer_len = 0x4000;
|
|
buflen -= 0x4000;
|
|
} else {
|
|
xfer_len = buflen;
|
|
buflen = 0;
|
|
}
|
|
|
|
if (urb->ep->bEndpointAddress & 0x80) {
|
|
token = QTD_TOKEN_PID_IN;
|
|
} else {
|
|
token = QTD_TOKEN_PID_OUT;
|
|
}
|
|
|
|
token |= QTD_TOKEN_STATUS_ACTIVE |
|
|
((uint32_t)EHCI_TUNE_CERR << QTD_TOKEN_CERR_SHIFT) |
|
|
((uint32_t)xfer_len << QTD_TOKEN_NBYTES_SHIFT);
|
|
|
|
if (buflen == 0) {
|
|
token |= QTD_TOKEN_IOC;
|
|
}
|
|
|
|
ehci_qtd_fill(qtd, (uintptr_t)buffer, xfer_len, token);
|
|
qtd->urb = urb;
|
|
qtd->hw.next_qtd = QTD_LIST_END;
|
|
buffer += xfer_len;
|
|
|
|
if (prev_qtd) {
|
|
prev_qtd->hw.next_qtd = EHCI_PTR2ADDR(qtd);
|
|
} else {
|
|
first_qtd = qtd;
|
|
}
|
|
prev_qtd = qtd;
|
|
|
|
if (buflen == 0) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* update qh first qtd */
|
|
qh->hw.curr_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
qh->hw.overlay.next_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
/* update data toggle */
|
|
if (urb->data_toggle) {
|
|
qh->hw.overlay.token = QTD_TOKEN_TOGGLE;
|
|
} else {
|
|
qh->hw.overlay.token = 0;
|
|
}
|
|
|
|
/* record qh first qtd */
|
|
qh->first_qtd = EHCI_PTR2ADDR(first_qtd);
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
qh->urb = urb;
|
|
urb->hcpriv = qh;
|
|
/* add qh into periodic list */
|
|
ehci_qh_add_head(&g_periodic_qh_head[bus->hcd.hcd_id], qh);
|
|
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_PSEN;
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
return qh;
|
|
}
|
|
|
|
static void ehci_urb_waitup(struct usbh_bus *bus, struct usbh_urb *urb)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
|
|
qh = (struct ehci_qh_hw *)urb->hcpriv;
|
|
qh->urb = NULL;
|
|
urb->hcpriv = NULL;
|
|
|
|
qh->remove_in_iaad = 0;
|
|
|
|
if (urb->timeout) {
|
|
usb_osal_sem_give(qh->waitsem);
|
|
} else {
|
|
ehci_qh_free(bus, qh);
|
|
}
|
|
|
|
if (urb->complete) {
|
|
if (urb->errorcode < 0) {
|
|
urb->complete(urb->arg, urb->errorcode);
|
|
} else {
|
|
urb->complete(urb->arg, urb->actual_length);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void ehci_qh_scan_qtds(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh)
|
|
{
|
|
struct ehci_qtd_hw *qtd;
|
|
|
|
(void)bus;
|
|
|
|
ehci_qh_remove(qhead, qh);
|
|
|
|
qtd = EHCI_ADDR2QTD(qh->first_qtd);
|
|
|
|
while (qtd) {
|
|
qtd->urb->actual_length += (qtd->length - ((qtd->hw.token & QTD_TOKEN_NBYTES_MASK) >> QTD_TOKEN_NBYTES_SHIFT));
|
|
|
|
qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd);
|
|
}
|
|
}
|
|
|
|
static void ehci_check_qh(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh)
|
|
{
|
|
struct usbh_urb *urb;
|
|
struct ehci_qtd_hw *qtd;
|
|
uint32_t token;
|
|
|
|
qtd = EHCI_ADDR2QTD(qh->first_qtd);
|
|
|
|
if (qtd == NULL) {
|
|
return;
|
|
}
|
|
|
|
while (qtd) {
|
|
#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE)
|
|
usb_dcache_invalidate((uintptr_t)&qtd->hw, CONFIG_USB_EHCI_ALIGN_SIZE);
|
|
#endif
|
|
token = qtd->hw.token;
|
|
|
|
if (token & QTD_TOKEN_STATUS_ERRORS) {
|
|
break;
|
|
} else if (token & QTD_TOKEN_STATUS_ACTIVE) {
|
|
return;
|
|
}
|
|
|
|
qtd = EHCI_ADDR2QTD(qtd->hw.next_qtd);
|
|
}
|
|
|
|
urb = qh->urb;
|
|
|
|
if ((token & QTD_TOKEN_STATUS_ERRORS) == 0) {
|
|
if (token & QTD_TOKEN_TOGGLE) {
|
|
urb->data_toggle = true;
|
|
} else {
|
|
urb->data_toggle = false;
|
|
}
|
|
urb->errorcode = 0;
|
|
} else {
|
|
if (token & QTD_TOKEN_STATUS_BABBLE) {
|
|
urb->errorcode = -USB_ERR_BABBLE;
|
|
urb->data_toggle = 0;
|
|
} else if (token & QTD_TOKEN_STATUS_HALTED) {
|
|
urb->errorcode = -USB_ERR_STALL;
|
|
urb->data_toggle = 0;
|
|
} else if (token & (QTD_TOKEN_STATUS_DBERR | QTD_TOKEN_STATUS_XACTERR)) {
|
|
urb->errorcode = -USB_ERR_IO;
|
|
}
|
|
}
|
|
|
|
ehci_qh_scan_qtds(bus, qhead, qh);
|
|
|
|
if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_INTERRUPT) {
|
|
ehci_urb_waitup(bus, urb);
|
|
} else {
|
|
qh->remove_in_iaad = 1;
|
|
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_IAAD;
|
|
}
|
|
}
|
|
|
|
static void ehci_kill_qh(struct usbh_bus *bus, struct ehci_qh_hw *qhead, struct ehci_qh_hw *qh)
|
|
{
|
|
(void)bus;
|
|
|
|
ehci_qh_remove(qhead, qh);
|
|
}
|
|
|
|
static int usbh_reset_port(struct usbh_bus *bus, const uint8_t port)
|
|
{
|
|
volatile uint32_t timeout = 0;
|
|
uint32_t regval;
|
|
|
|
#if defined(CONFIG_USB_EHCI_HPMICRO) && CONFIG_USB_EHCI_HPMICRO
|
|
if ((*(volatile uint32_t *)(bus->hcd.reg_base + 0x224) & 0xc0) == (2 << 6)) { /* Hardcode for hpm */
|
|
EHCI_HCOR->portsc[port - 1] |= (1 << 29);
|
|
} else {
|
|
EHCI_HCOR->portsc[port - 1] &= ~(1 << 29);
|
|
}
|
|
#endif
|
|
regval = EHCI_HCOR->portsc[port - 1];
|
|
regval &= ~EHCI_PORTSC_PE;
|
|
regval |= EHCI_PORTSC_RESET;
|
|
EHCI_HCOR->portsc[port - 1] = regval;
|
|
usb_osal_msleep(55);
|
|
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_RESET;
|
|
while ((EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_RESET) != 0) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -USB_ERR_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
__WEAK void usb_hc_low_level_init(struct usbh_bus *bus)
|
|
{
|
|
(void)bus;
|
|
}
|
|
|
|
__WEAK void usb_hc_low_level2_init(struct usbh_bus *bus)
|
|
{
|
|
(void)bus;
|
|
}
|
|
|
|
__WEAK void usb_hc_low_level_deinit(struct usbh_bus *bus)
|
|
{
|
|
(void)bus;
|
|
}
|
|
|
|
int usb_hc_init(struct usbh_bus *bus)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
struct ehci_qtd_hw *qtd;
|
|
|
|
volatile uint32_t timeout = 0;
|
|
uint32_t regval;
|
|
|
|
memset(&g_ehci_hcd[bus->hcd.hcd_id], 0, sizeof(struct ehci_hcd));
|
|
memset(ehci_qh_pool[bus->hcd.hcd_id], 0, sizeof(struct ehci_qh_hw) * CONFIG_USB_EHCI_QH_NUM);
|
|
memset(ehci_qtd_pool[bus->hcd.hcd_id], 0, sizeof(struct ehci_qtd_hw) * CONFIG_USB_EHCI_QTD_NUM);
|
|
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
qh = &ehci_qh_pool[bus->hcd.hcd_id][index];
|
|
if ((uint32_t)&qh->hw % 32) {
|
|
USB_LOG_ERR("struct ehci_qh_hw is not align 32\r\n");
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
}
|
|
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QTD_NUM; index++) {
|
|
qtd = &ehci_qtd_pool[bus->hcd.hcd_id][index];
|
|
if ((uint32_t)&qtd->hw % 32) {
|
|
USB_LOG_ERR("struct ehci_qtd_hw is not align 32\r\n");
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
}
|
|
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
qh = &ehci_qh_pool[bus->hcd.hcd_id][index];
|
|
qh->waitsem = usb_osal_sem_create(0);
|
|
}
|
|
|
|
memset(&g_async_qh_head[bus->hcd.hcd_id], 0, sizeof(struct ehci_qh_hw));
|
|
g_async_qh_head[bus->hcd.hcd_id].hw.hlp = QH_HLP_QH(&g_async_qh_head[bus->hcd.hcd_id]);
|
|
g_async_qh_head[bus->hcd.hcd_id].hw.epchar = QH_EPCHAR_H;
|
|
g_async_qh_head[bus->hcd.hcd_id].hw.overlay.next_qtd = QTD_LIST_END;
|
|
g_async_qh_head[bus->hcd.hcd_id].hw.overlay.alt_next_qtd = QTD_LIST_END;
|
|
g_async_qh_head[bus->hcd.hcd_id].hw.overlay.token = QTD_TOKEN_STATUS_HALTED;
|
|
g_async_qh_head[bus->hcd.hcd_id].first_qtd = QTD_LIST_END;
|
|
|
|
memset(g_framelist[bus->hcd.hcd_id], 0, sizeof(uint32_t) * CONFIG_USB_EHCI_FRAME_LIST_SIZE);
|
|
|
|
memset(&g_periodic_qh_head[bus->hcd.hcd_id], 0, sizeof(struct ehci_qh_hw));
|
|
g_periodic_qh_head[bus->hcd.hcd_id].hw.hlp = QH_HLP_END;
|
|
g_periodic_qh_head[bus->hcd.hcd_id].hw.epchar = QH_EPCAPS_SSMASK(1);
|
|
g_periodic_qh_head[bus->hcd.hcd_id].hw.overlay.next_qtd = QTD_LIST_END;
|
|
g_periodic_qh_head[bus->hcd.hcd_id].hw.overlay.alt_next_qtd = QTD_LIST_END;
|
|
g_periodic_qh_head[bus->hcd.hcd_id].hw.overlay.token = QTD_TOKEN_STATUS_HALTED;
|
|
g_periodic_qh_head[bus->hcd.hcd_id].first_qtd = QTD_LIST_END;
|
|
|
|
for (uint32_t i = 0; i < CONFIG_USB_EHCI_FRAME_LIST_SIZE; i++) {
|
|
g_framelist[bus->hcd.hcd_id][i] = QH_HLP_QH(&g_periodic_qh_head[bus->hcd.hcd_id]);
|
|
}
|
|
|
|
#if defined(CONFIG_USB_EHCI_DESC_DCACHE_ENABLE)
|
|
usb_dcache_clean((uintptr_t)&g_async_qh_head[bus->hcd.hcd_id].hw, CONFIG_USB_EHCI_ALIGN_SIZE);
|
|
usb_dcache_clean((uintptr_t)&g_periodic_qh_head[bus->hcd.hcd_id].hw, CONFIG_USB_EHCI_ALIGN_SIZE);
|
|
usb_dcache_clean((uintptr_t)g_framelist[bus->hcd.hcd_id], sizeof(uint32_t) * CONFIG_USB_EHCI_FRAME_LIST_SIZE);
|
|
#endif
|
|
|
|
usb_hc_low_level_init(bus);
|
|
|
|
USB_LOG_INFO("EHCI HCIVERSION:0x%04x\r\n", (unsigned int)EHCI_HCCR->hciversion);
|
|
USB_LOG_INFO("EHCI HCSPARAMS:0x%06x\r\n", (unsigned int)EHCI_HCCR->hcsparams);
|
|
USB_LOG_INFO("EHCI HCCPARAMS:0x%04x\r\n", (unsigned int)EHCI_HCCR->hccparams);
|
|
|
|
g_ehci_hcd[bus->hcd.hcd_id].ppc = (EHCI_HCCR->hcsparams & EHCI_HCSPARAMS_PPC) ? true : false;
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_ports = (EHCI_HCCR->hcsparams & EHCI_HCSPARAMS_NPORTS_MASK) >> EHCI_HCSPARAMS_NPORTS_SHIFT;
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_cc = (EHCI_HCCR->hcsparams & EHCI_HCSPARAMS_NCC_MASK) >> EHCI_HCSPARAMS_NCC_SHIFT;
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_pcc = (EHCI_HCCR->hcsparams & EHCI_HCSPARAMS_NPCC_MASK) >> EHCI_HCSPARAMS_NPCC_SHIFT;
|
|
g_ehci_hcd[bus->hcd.hcd_id].has_tt = g_ehci_hcd[bus->hcd.hcd_id].n_cc ? false : true;
|
|
g_ehci_hcd[bus->hcd.hcd_id].hcor_offset = EHCI_HCCR->caplength;
|
|
|
|
USB_LOG_INFO("EHCI ppc:%u, n_ports:%u, n_cc:%u, n_pcc:%u\r\n",
|
|
g_ehci_hcd[bus->hcd.hcd_id].ppc,
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_ports,
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_cc,
|
|
g_ehci_hcd[bus->hcd.hcd_id].n_pcc);
|
|
|
|
EHCI_HCOR->usbcmd &= ~EHCI_USBCMD_RUN;
|
|
usb_osal_msleep(2);
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_HCRESET;
|
|
while (EHCI_HCOR->usbcmd & EHCI_USBCMD_HCRESET) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -USB_ERR_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
usb_hc_low_level2_init(bus);
|
|
|
|
EHCI_HCOR->usbintr = 0;
|
|
EHCI_HCOR->usbsts = EHCI_HCOR->usbsts;
|
|
|
|
/* Set the Current Asynchronous List Address. */
|
|
EHCI_HCOR->asynclistaddr = EHCI_PTR2ADDR(&g_async_qh_head[bus->hcd.hcd_id]);
|
|
/* Set the Periodic Frame List Base Address. */
|
|
EHCI_HCOR->periodiclistbase = EHCI_PTR2ADDR(g_framelist[bus->hcd.hcd_id]);
|
|
|
|
regval = EHCI_HCOR->usbcmd;
|
|
regval &= ~(EHCI_USBCMD_ITHRE_MASK | EHCI_USBCMD_FLSIZE_MASK);
|
|
#if CONFIG_USB_EHCI_FRAME_LIST_SIZE == 1024
|
|
regval |= EHCI_USBCMD_FLSIZE_1024;
|
|
#elif CONFIG_USB_EHCI_FRAME_LIST_SIZE == 512
|
|
regval |= EHCI_USBCMD_FLSIZE_512;
|
|
#elif CONFIG_USB_EHCI_FRAME_LIST_SIZE == 256
|
|
regval |= EHCI_USBCMD_FLSIZE_256;
|
|
#else
|
|
#error Unsupported frame size list size
|
|
#endif
|
|
|
|
#if !defined(CONFIG_USB_EHCI_HPMICRO) || !CONFIG_USB_EHCI_HPMICRO
|
|
regval |= EHCI_USBCMD_ITHRE_1MF;
|
|
#endif
|
|
regval |= EHCI_USBCMD_ASEN;
|
|
regval |= EHCI_USBCMD_PSEN;
|
|
regval |= EHCI_USBCMD_RUN;
|
|
EHCI_HCOR->usbcmd = regval;
|
|
|
|
#ifdef CONFIG_USB_EHCI_CONFIGFLAG
|
|
EHCI_HCOR->configflag = EHCI_CONFIGFLAG;
|
|
#endif
|
|
/* Wait for the EHCI to run (no longer report halted) */
|
|
timeout = 0;
|
|
while (EHCI_HCOR->usbsts & EHCI_USBSTS_HALTED) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -USB_ERR_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
if (g_ehci_hcd[bus->hcd.hcd_id].ppc) {
|
|
for (uint8_t port = 0; port < g_ehci_hcd[bus->hcd.hcd_id].n_ports; port++) {
|
|
regval = EHCI_HCOR->portsc[port];
|
|
regval |= EHCI_PORTSC_PP;
|
|
regval &= ~(EHCI_PORTSC_CSC | EHCI_PORTSC_PEC | EHCI_PORTSC_OCC);
|
|
EHCI_HCOR->portsc[port] = regval;
|
|
}
|
|
}
|
|
|
|
if (g_ehci_hcd[bus->hcd.hcd_id].has_tt) {
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
USB_LOG_INFO("EHCI uses tt for ls/fs device, so cannot enable this macro\r\n");
|
|
return -USB_ERR_INVAL;
|
|
#endif
|
|
}
|
|
|
|
if (g_ehci_hcd[bus->hcd.hcd_id].has_tt) {
|
|
USB_LOG_INFO("EHCI uses tt for ls/fs device\r\n");
|
|
} else {
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
USB_LOG_INFO("EHCI uses companion controller for ls/fs device\r\n");
|
|
ohci_init(bus);
|
|
#else
|
|
USB_LOG_WRN("Do not enable companion controller, you should use a hub to support ls/fs device\r\n");
|
|
#endif
|
|
}
|
|
|
|
/* Enable EHCI interrupts. */
|
|
EHCI_HCOR->usbintr = EHCI_USBIE_INT | EHCI_USBIE_ERR | EHCI_USBIE_PCD | EHCI_USBIE_FATAL | EHCI_USBIE_IAA;
|
|
return 0;
|
|
}
|
|
|
|
int usb_hc_deinit(struct usbh_bus *bus)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
|
|
volatile uint32_t timeout = 0;
|
|
uint32_t regval;
|
|
|
|
EHCI_HCOR->usbintr = 0;
|
|
|
|
regval = EHCI_HCOR->usbcmd;
|
|
regval &= ~EHCI_USBCMD_ASEN;
|
|
regval &= ~EHCI_USBCMD_PSEN;
|
|
regval &= ~EHCI_USBCMD_RUN;
|
|
EHCI_HCOR->usbcmd = regval;
|
|
|
|
while ((EHCI_HCOR->usbsts & (EHCI_USBSTS_PSS | EHCI_USBSTS_ASS)) || ((EHCI_HCOR->usbsts & EHCI_USBSTS_HALTED) == 0)) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
return -USB_ERR_TIMEOUT;
|
|
}
|
|
}
|
|
|
|
if (g_ehci_hcd[bus->hcd.hcd_id].ppc) {
|
|
for (uint8_t port = 0; port < g_ehci_hcd[bus->hcd.hcd_id].n_ports; port++) {
|
|
regval = EHCI_HCOR->portsc[port];
|
|
regval &= ~EHCI_PORTSC_PP;
|
|
EHCI_HCOR->portsc[port] = regval;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_USB_EHCI_CONFIGFLAG
|
|
EHCI_HCOR->configflag = 0;
|
|
#endif
|
|
|
|
EHCI_HCOR->usbsts = EHCI_HCOR->usbsts;
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_HCRESET;
|
|
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
qh = &ehci_qh_pool[bus->hcd.hcd_id][index];
|
|
usb_osal_sem_delete(qh->waitsem);
|
|
}
|
|
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
ohci_deinit(bus);
|
|
#endif
|
|
|
|
usb_hc_low_level_deinit(bus);
|
|
return 0;
|
|
}
|
|
|
|
uint16_t usbh_get_frame_number(struct usbh_bus *bus)
|
|
{
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
if (EHCI_HCOR->portsc[0] & EHCI_PORTSC_OWNER) {
|
|
return ohci_get_frame_number(bus);
|
|
}
|
|
#endif
|
|
|
|
return (((EHCI_HCOR->frindex & EHCI_FRINDEX_MASK) >> 3) & 0x3ff);
|
|
}
|
|
|
|
int usbh_roothub_control(struct usbh_bus *bus, struct usb_setup_packet *setup, uint8_t *buf)
|
|
{
|
|
uint8_t nports;
|
|
uint8_t port;
|
|
uint32_t temp, status;
|
|
|
|
nports = g_ehci_hcd[bus->hcd.hcd_id].n_ports;
|
|
|
|
port = setup->wIndex;
|
|
|
|
temp = EHCI_HCOR->portsc[port - 1];
|
|
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
if (temp & EHCI_PORTSC_OWNER) {
|
|
return ohci_roothub_control(bus, setup, buf);
|
|
}
|
|
|
|
if ((temp & EHCI_PORTSC_LSTATUS_MASK) == EHCI_PORTSC_LSTATUS_KSTATE) {
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_OWNER;
|
|
|
|
while (!(EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_OWNER)) {
|
|
}
|
|
USB_LOG_INFO("Switch port %u to OHCI\r\n", port);
|
|
return ohci_roothub_control(bus, setup, buf);
|
|
}
|
|
#endif
|
|
if (setup->bmRequestType & USB_REQUEST_RECIPIENT_DEVICE) {
|
|
switch (setup->bRequest) {
|
|
case HUB_REQUEST_CLEAR_FEATURE:
|
|
switch (setup->wValue) {
|
|
case HUB_FEATURE_HUB_C_LOCALPOWER:
|
|
break;
|
|
case HUB_FEATURE_HUB_C_OVERCURRENT:
|
|
break;
|
|
default:
|
|
return -USB_ERR_NOTSUPP;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_SET_FEATURE:
|
|
switch (setup->wValue) {
|
|
case HUB_FEATURE_HUB_C_LOCALPOWER:
|
|
break;
|
|
case HUB_FEATURE_HUB_C_OVERCURRENT:
|
|
break;
|
|
default:
|
|
return -USB_ERR_NOTSUPP;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_GET_DESCRIPTOR:
|
|
break;
|
|
case HUB_REQUEST_GET_STATUS:
|
|
memset(buf, 0, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
} else if (setup->bmRequestType & USB_REQUEST_RECIPIENT_OTHER) {
|
|
switch (setup->bRequest) {
|
|
case HUB_REQUEST_CLEAR_FEATURE:
|
|
if (!port || port > nports) {
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
|
|
switch (setup->wValue) {
|
|
case HUB_PORT_FEATURE_ENABLE:
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_PE;
|
|
break;
|
|
case HUB_PORT_FEATURE_SUSPEND:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_RESUME;
|
|
usb_osal_msleep(20);
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_RESUME;
|
|
while (EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_RESUME) {
|
|
}
|
|
|
|
temp = EHCI_HCOR->usbcmd;
|
|
temp |= EHCI_USBCMD_ASEN;
|
|
temp |= EHCI_USBCMD_PSEN;
|
|
temp |= EHCI_USBCMD_RUN;
|
|
EHCI_HCOR->usbcmd = temp;
|
|
|
|
while ((EHCI_HCOR->usbcmd & EHCI_USBCMD_RUN) == 0) {
|
|
}
|
|
|
|
case HUB_PORT_FEATURE_C_SUSPEND:
|
|
break;
|
|
case HUB_PORT_FEATURE_POWER:
|
|
EHCI_HCOR->portsc[port - 1] &= ~EHCI_PORTSC_PP;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_CONNECTION:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_CSC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_ENABLE:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_PEC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_OVER_CURREN:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_OCC;
|
|
break;
|
|
case HUB_PORT_FEATURE_C_RESET:
|
|
break;
|
|
default:
|
|
return -USB_ERR_NOTSUPP;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_SET_FEATURE:
|
|
if (!port || port > nports) {
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
|
|
switch (setup->wValue) {
|
|
case HUB_PORT_FEATURE_SUSPEND:
|
|
temp = EHCI_HCOR->usbcmd;
|
|
temp &= ~EHCI_USBCMD_ASEN;
|
|
temp &= ~EHCI_USBCMD_PSEN;
|
|
temp &= ~EHCI_USBCMD_RUN;
|
|
EHCI_HCOR->usbcmd = temp;
|
|
|
|
while (EHCI_HCOR->usbcmd & EHCI_USBCMD_RUN) {
|
|
}
|
|
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_SUSPEND;
|
|
while ((EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_SUSPEND) == 0) {
|
|
}
|
|
break;
|
|
case HUB_PORT_FEATURE_POWER:
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_PP;
|
|
break;
|
|
case HUB_PORT_FEATURE_RESET:
|
|
usbh_reset_port(bus, port);
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
if (!(EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_PE)) {
|
|
EHCI_HCOR->portsc[port - 1] |= EHCI_PORTSC_OWNER;
|
|
|
|
while (!(EHCI_HCOR->portsc[port - 1] & EHCI_PORTSC_OWNER)) {
|
|
}
|
|
|
|
USB_LOG_INFO("Switch port %u to OHCI\r\n", port);
|
|
return -USB_ERR_NOTSUPP;
|
|
}
|
|
#endif
|
|
break;
|
|
|
|
default:
|
|
return -USB_ERR_NOTSUPP;
|
|
}
|
|
break;
|
|
case HUB_REQUEST_GET_STATUS:
|
|
if (!port || port > nports) {
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
temp = EHCI_HCOR->portsc[port - 1];
|
|
|
|
status = 0;
|
|
if (temp & EHCI_PORTSC_CSC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_CONNECTION);
|
|
}
|
|
if (temp & EHCI_PORTSC_PEC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_ENABLE);
|
|
}
|
|
if (temp & EHCI_PORTSC_OCC) {
|
|
status |= (1 << HUB_PORT_FEATURE_C_OVER_CURREN);
|
|
}
|
|
|
|
if (temp & EHCI_PORTSC_CCS) {
|
|
status |= (1 << HUB_PORT_FEATURE_CONNECTION);
|
|
}
|
|
if (temp & EHCI_PORTSC_PE) {
|
|
status |= (1 << HUB_PORT_FEATURE_ENABLE);
|
|
|
|
if (usbh_get_port_speed(bus, port) == USB_SPEED_LOW) {
|
|
status |= (1 << HUB_PORT_FEATURE_LOWSPEED);
|
|
} else if (usbh_get_port_speed(bus, port) == USB_SPEED_HIGH) {
|
|
status |= (1 << HUB_PORT_FEATURE_HIGHSPEED);
|
|
}
|
|
}
|
|
if (temp & EHCI_PORTSC_SUSPEND) {
|
|
status |= (1 << HUB_PORT_FEATURE_SUSPEND);
|
|
}
|
|
if (temp & EHCI_PORTSC_OCA) {
|
|
status |= (1 << HUB_PORT_FEATURE_OVERCURRENT);
|
|
}
|
|
if (temp & EHCI_PORTSC_RESET) {
|
|
status |= (1 << HUB_PORT_FEATURE_RESET);
|
|
}
|
|
if (temp & EHCI_PORTSC_PP || !(EHCI_HCCR->hcsparams & EHCI_HCSPARAMS_PPC)) {
|
|
status |= (1 << HUB_PORT_FEATURE_POWER);
|
|
}
|
|
memcpy(buf, &status, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int usbh_submit_urb(struct usbh_urb *urb)
|
|
{
|
|
struct ehci_qh_hw *qh = NULL;
|
|
size_t flags;
|
|
int ret = 0;
|
|
struct usbh_hub *hub;
|
|
struct usbh_hubport *hport;
|
|
struct usbh_bus *bus;
|
|
|
|
if (!urb || !urb->hport || !urb->ep || !urb->hport->bus) {
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
|
|
#ifdef CONFIG_USB_DCACHE_ENABLE
|
|
USB_ASSERT_MSG(!((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) &&
|
|
!((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE),
|
|
"urb->setup or urb->transfer_buffer is not aligned %d", CONFIG_USB_ALIGN_SIZE);
|
|
#endif
|
|
bus = urb->hport->bus;
|
|
|
|
/* find active hubport in roothub */
|
|
hport = urb->hport;
|
|
hub = urb->hport->parent;
|
|
while (!hub->is_roothub) {
|
|
hport = hub->parent;
|
|
hub = hub->parent->parent;
|
|
}
|
|
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
if (EHCI_HCOR->portsc[hport->port - 1] & EHCI_PORTSC_OWNER) {
|
|
return ohci_submit_urb(urb);
|
|
}
|
|
#endif
|
|
|
|
if (!urb->hport->connected || !(EHCI_HCOR->portsc[hport->port - 1] & EHCI_PORTSC_CCS)) {
|
|
return -USB_ERR_NOTCONN;
|
|
}
|
|
|
|
if (urb->errorcode == -USB_ERR_BUSY) {
|
|
return -USB_ERR_BUSY;
|
|
}
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
urb->hcpriv = NULL;
|
|
urb->errorcode = -USB_ERR_BUSY;
|
|
urb->actual_length = 0;
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
|
|
switch (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes)) {
|
|
case USB_ENDPOINT_TYPE_CONTROL:
|
|
qh = ehci_control_urb_init(bus, urb, urb->setup, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -USB_ERR_NOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_BULK:
|
|
qh = ehci_bulk_urb_init(bus, urb, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -USB_ERR_NOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_INTERRUPT:
|
|
qh = ehci_intr_urb_init(bus, urb, urb->transfer_buffer, urb->transfer_buffer_length);
|
|
if (qh == NULL) {
|
|
return -USB_ERR_NOMEM;
|
|
}
|
|
break;
|
|
case USB_ENDPOINT_TYPE_ISOCHRONOUS:
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ret = ehci_iso_urb_init(bus, urb);
|
|
#endif
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (urb->timeout > 0) {
|
|
/* wait until timeout or sem give */
|
|
ret = usb_osal_sem_take(qh->waitsem, urb->timeout);
|
|
if (ret < 0) {
|
|
goto errout_timeout;
|
|
}
|
|
urb->timeout = 0;
|
|
ret = urb->errorcode;
|
|
/* we can free qh when waitsem is done */
|
|
ehci_qh_free(bus, qh);
|
|
}
|
|
return ret;
|
|
errout_timeout:
|
|
urb->timeout = 0;
|
|
usbh_kill_urb(urb);
|
|
return ret;
|
|
}
|
|
|
|
int usbh_kill_urb(struct usbh_urb *urb)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
struct usbh_bus *bus;
|
|
size_t flags;
|
|
bool remove_in_iaad = false;
|
|
|
|
if (!urb || !urb->hport || !urb->hcpriv || !urb->hport->bus) {
|
|
return -USB_ERR_INVAL;
|
|
}
|
|
|
|
bus = urb->hport->bus;
|
|
|
|
#ifdef CONFIG_USB_EHCI_WITH_OHCI
|
|
if (EHCI_HCOR->portsc[urb->hport->port - 1] & EHCI_PORTSC_OWNER) {
|
|
return ohci_kill_urb(urb);
|
|
}
|
|
#endif
|
|
|
|
flags = usb_osal_enter_critical_section();
|
|
|
|
EHCI_HCOR->usbcmd &= ~(EHCI_USBCMD_PSEN | EHCI_USBCMD_ASEN);
|
|
|
|
if ((USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_CONTROL) || (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_BULK)) {
|
|
qh = EHCI_ADDR2QH(g_async_qh_head[bus->hcd.hcd_id].hw.hlp);
|
|
while ((qh != &g_async_qh_head[bus->hcd.hcd_id]) && qh) {
|
|
if (qh->urb == urb) {
|
|
remove_in_iaad = true;
|
|
ehci_kill_qh(bus, &g_async_qh_head[bus->hcd.hcd_id], qh);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
} else if (USB_GET_ENDPOINT_TYPE(urb->ep->bmAttributes) == USB_ENDPOINT_TYPE_INTERRUPT) {
|
|
qh = EHCI_ADDR2QH(g_periodic_qh_head[bus->hcd.hcd_id].hw.hlp);
|
|
while (qh) {
|
|
if (qh->urb == urb) {
|
|
ehci_kill_qh(bus, &g_periodic_qh_head[bus->hcd.hcd_id], qh);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
} else {
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_kill_iso_urb(bus, urb);
|
|
EHCI_HCOR->usbcmd |= (EHCI_USBCMD_PSEN | EHCI_USBCMD_ASEN);
|
|
usb_osal_leave_critical_section(flags);
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
EHCI_HCOR->usbcmd |= (EHCI_USBCMD_PSEN | EHCI_USBCMD_ASEN);
|
|
|
|
qh = (struct ehci_qh_hw *)urb->hcpriv;
|
|
urb->hcpriv = NULL;
|
|
urb->errorcode = -USB_ERR_SHUTDOWN;
|
|
qh->urb = NULL;
|
|
|
|
if (urb->timeout) {
|
|
usb_osal_sem_give(qh->waitsem);
|
|
} else {
|
|
ehci_qh_free(bus, qh);
|
|
}
|
|
|
|
if (remove_in_iaad) {
|
|
volatile uint32_t timeout = 0;
|
|
EHCI_HCOR->usbcmd |= EHCI_USBCMD_IAAD;
|
|
while (!(EHCI_HCOR->usbsts & EHCI_USBSTS_IAA)) {
|
|
usb_osal_msleep(1);
|
|
timeout++;
|
|
if (timeout > 100) {
|
|
usb_osal_leave_critical_section(flags);
|
|
return -USB_ERR_TIMEOUT;
|
|
}
|
|
}
|
|
EHCI_HCOR->usbsts = EHCI_USBSTS_IAA;
|
|
}
|
|
|
|
usb_osal_leave_critical_section(flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ehci_scan_async_list(struct usbh_bus *bus)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
|
|
qh = EHCI_ADDR2QH(g_async_qh_head[bus->hcd.hcd_id].hw.hlp);
|
|
while ((qh != &g_async_qh_head[bus->hcd.hcd_id]) && qh) {
|
|
if (qh->urb) {
|
|
ehci_check_qh(bus, &g_async_qh_head[bus->hcd.hcd_id], qh);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
}
|
|
|
|
static void ehci_scan_periodic_list(struct usbh_bus *bus)
|
|
{
|
|
struct ehci_qh_hw *qh;
|
|
|
|
qh = EHCI_ADDR2QH(g_periodic_qh_head[bus->hcd.hcd_id].hw.hlp);
|
|
while (qh) {
|
|
if (qh->urb) {
|
|
ehci_check_qh(bus, &g_periodic_qh_head[bus->hcd.hcd_id], qh);
|
|
}
|
|
qh = EHCI_ADDR2QH(qh->hw.hlp);
|
|
}
|
|
}
|
|
|
|
void USBH_IRQHandler(uint8_t busid)
|
|
{
|
|
uint32_t usbsts;
|
|
struct usbh_bus *bus;
|
|
|
|
bus = &g_usbhost_bus[busid];
|
|
|
|
usbsts = EHCI_HCOR->usbsts & EHCI_HCOR->usbintr;
|
|
EHCI_HCOR->usbsts = usbsts;
|
|
|
|
if (usbsts & EHCI_USBSTS_INT) {
|
|
ehci_scan_async_list(bus);
|
|
ehci_scan_periodic_list(bus);
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_scan_isochronous_list(bus);
|
|
#endif
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_ERR) {
|
|
ehci_scan_async_list(bus);
|
|
ehci_scan_periodic_list(bus);
|
|
#ifdef CONFIG_USB_EHCI_ISO
|
|
ehci_scan_isochronous_list(bus);
|
|
#endif
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_PCD) {
|
|
for (int port = 0; port < g_ehci_hcd[bus->hcd.hcd_id].n_ports; port++) {
|
|
uint32_t portsc = EHCI_HCOR->portsc[port];
|
|
|
|
if (portsc & EHCI_PORTSC_CSC) {
|
|
if ((portsc & EHCI_PORTSC_CCS) == EHCI_PORTSC_CCS) {
|
|
} else {
|
|
#if defined(CONFIG_USB_EHCI_NXP)
|
|
/* kUSB_ControllerEhci0 and kUSB_ControllerEhci1*/
|
|
extern void USB_EhcihostPhyDisconnectDetectCmd(uint8_t controllerId, uint8_t enable);
|
|
USB_EhcihostPhyDisconnectDetectCmd(2 + busid, 0);
|
|
#endif
|
|
}
|
|
bus->hcd.roothub.int_buffer[0] |= (1 << (port + 1));
|
|
usbh_hub_thread_wakeup(&bus->hcd.roothub);
|
|
}
|
|
}
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_IAA) {
|
|
for (uint8_t index = 0; index < CONFIG_USB_EHCI_QH_NUM; index++) {
|
|
struct ehci_qh_hw *qh = &ehci_qh_pool[bus->hcd.hcd_id][index];
|
|
if (qh->remove_in_iaad) {
|
|
ehci_urb_waitup(bus, qh->urb);
|
|
}
|
|
}
|
|
}
|
|
|
|
if (usbsts & EHCI_USBSTS_FATAL) {
|
|
}
|
|
} |