update: add USB_ASSERT_MSG for common case

Signed-off-by: sakumisu <1203593632@qq.com>
This commit is contained in:
sakumisu 2025-05-06 22:34:41 +08:00
parent a41000a000
commit d4dfb03afc
6 changed files with 34 additions and 114 deletions

View File

@ -227,21 +227,13 @@ static int parse_config_descriptor(struct usbh_hubport *hport, struct usb_config
cur_alt_setting = intf_desc->bAlternateSetting;
cur_ep_num = intf_desc->bNumEndpoints;
cur_ep = 0;
if (cur_iface > (CONFIG_USBHOST_MAX_INTERFACES - 1)) {
USB_LOG_ERR("Interface num overflow\r\n");
while (1) {
}
}
if (cur_alt_setting > (CONFIG_USBHOST_MAX_INTF_ALTSETTINGS - 1)) {
USB_LOG_ERR("Interface altsetting num overflow\r\n");
while (1) {
}
}
if (cur_ep_num > CONFIG_USBHOST_MAX_ENDPOINTS) {
USB_LOG_ERR("Endpoint num overflow\r\n");
while (1) {
}
}
USB_ASSERT_MSG(cur_iface < CONFIG_USBHOST_MAX_INTERFACES,
"Interface num %d overflow", cur_iface);
USB_ASSERT_MSG(cur_alt_setting < CONFIG_USBHOST_MAX_INTF_ALTSETTINGS,
"Interface altsetting num %d overflow", cur_alt_setting);
USB_ASSERT_MSG(cur_ep_num <= CONFIG_USBHOST_MAX_ENDPOINTS,
"Endpoint num %d overflow", cur_ep_num);
#if 0
USB_LOG_DBG("Interface Descriptor:\r\n");
USB_LOG_DBG("bLength: 0x%02x \r\n", intf_desc->bLength);

View File

@ -538,11 +538,7 @@ int usb_dc_init(uint8_t busid)
USB_LOG_INFO("dwc2 has %d endpoints and dfifo depth(32-bit words) is %d, default config: %d endpoints\r\n", endpoints, (USB_OTG_GLB->GHWCFG3 >> 16), CONFIG_USBDEV_EP_NUM);
USB_LOG_INFO("=================================\r\n");
if (endpoints < CONFIG_USBDEV_EP_NUM) {
USB_LOG_ERR("dwc2 has less endpoints than config, please check\r\n");
while (1) {
}
}
USB_ASSERT_MSG(endpoints >= CONFIG_USBDEV_EP_NUM, "dwc2 has less endpoints than config, please check");
USB_OTG_DEV->DCTL |= USB_OTG_DCTL_SDIS;
@ -591,11 +587,7 @@ int usb_dc_init(uint8_t busid)
USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_WUIM;
#ifdef CONFIG_USB_DWC2_DMA_ENABLE
if (((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) != 2) {
USB_LOG_ERR("This dwc2 version does not support dma mode, so stop working\r\n");
while (1) {
}
}
USB_ASSERT_MSG(((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) == 2, "This dwc2 version does not support dma mode, so stop working");
USB_OTG_DEV->DCFG &= ~USB_OTG_DCFG_DESCDMA;
USB_OTG_GLB->GAHBCFG &= ~USB_OTG_GAHBCFG_HBSTLEN;
@ -643,18 +635,9 @@ int usb_dc_init(uint8_t busid)
fifo_num += CONFIG_USB_DWC2_TX8_FIFO_SIZE;
#endif
if (fifo_num > (USB_OTG_GLB->GHWCFG3 >> 16)) {
USB_LOG_ERR("Your fifo config is overflow, please check\r\n");
while (1) {
}
}
USB_ASSERT_MSG(fifo_num <= (USB_OTG_GLB->GHWCFG3 >> 16), "Your fifo config is overflow, please check");
/* xxx32 chips do not follow (USB_OTG_GLB->GHWCFG3 >> 16) if hsphy_type is zero, they use 1.25KB(320 DWORD) */
if ((hsphy_type == 0) && (fifo_num > 320)) {
USB_LOG_ERR("Your fifo config is larger than 320 , please check\r\n");
while (1) {
}
}
USB_ASSERT_MSG(!((hsphy_type == 0) && (fifo_num > 320)), "Your fifo config is larger than 320 , please check");
ret = dwc2_flush_txfifo(busid, 0x10U);
ret = dwc2_flush_rxfifo(busid);
@ -890,20 +873,15 @@ int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, ui
uint8_t ep_idx = USB_EP_GET_IDX(ep);
uint32_t pktcnt = 0;
USB_ASSERT_MSG(!((uint32_t)data % 0x04), "dwc2 data must be 4-byte aligned");
if (!data && data_len) {
return -1;
}
#if 0 /* some chips have confused with this, so disable as default */
if (USB_OTG_INEP(ep_idx)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) {
return -2;
}
#endif
if (ep_idx && !(USB_OTG_INEP(ep_idx)->DIEPCTL & USB_OTG_DIEPCTL_MPSIZ)) {
return -3;
}
if ((uint32_t)data & 0x03) {
return -4;
}
g_dwc2_udc[busid].in_ep[ep_idx].xfer_buf = (uint8_t *)data;
g_dwc2_udc[busid].in_ep[ep_idx].xfer_len = data_len;
@ -963,20 +941,15 @@ int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t
uint8_t ep_idx = USB_EP_GET_IDX(ep);
uint32_t pktcnt = 0;
USB_ASSERT_MSG(!((uint32_t)data % 0x04), "dwc2 data must be 4-byte aligned");
if (!data && data_len) {
return -1;
}
#if 0 /* some chips have confused with this, so disable as default */
if (USB_OTG_OUTEP(ep_idx)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) {
return -2;
}
#endif
if (ep_idx && !(USB_OTG_OUTEP(ep_idx)->DOEPCTL & USB_OTG_DOEPCTL_MPSIZ)) {
return -3;
}
if (((uint32_t)data) & 0x03) {
return -4;
}
g_dwc2_udc[busid].out_ep[ep_idx].xfer_buf = (uint8_t *)data;
g_dwc2_udc[busid].out_ep[ep_idx].xfer_len = data_len;

View File

@ -491,17 +491,9 @@ int usb_hc_init(struct usbh_bus *bus)
USB_LOG_INFO("dwc2 has %d channels and dfifo depth(32-bit words) is %d\r\n", ((USB_OTG_GLB->GHWCFG2 & (0x0f << 14)) >> 14) + 1, (USB_OTG_GLB->GHWCFG3 >> 16));
if (((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) != 2) {
USB_LOG_ERR("This dwc2 version does not support dma mode, so stop working\r\n");
while (1) {
}
}
if ((CONFIG_USB_DWC2_RX_FIFO_SIZE + CONFIG_USB_DWC2_NPTX_FIFO_SIZE + CONFIG_USB_DWC2_PTX_FIFO_SIZE) > (USB_OTG_GLB->GHWCFG3 >> 16)) {
USB_LOG_ERR("Your fifo config is overflow, please check\r\n");
while (1) {
}
}
USB_ASSERT_MSG(((USB_OTG_GLB->GHWCFG2 & (0x3U << 3)) >> 3) == 2, "This dwc2 version does not support dma mode, so stop working");
USB_ASSERT_MSG((CONFIG_USB_DWC2_RX_FIFO_SIZE + CONFIG_USB_DWC2_NPTX_FIFO_SIZE + CONFIG_USB_DWC2_PTX_FIFO_SIZE) <= (USB_OTG_GLB->GHWCFG3 >> 16),
"Your fifo config is overflow, please check");
USB_OTG_GLB->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
@ -763,16 +755,13 @@ int usbh_submit_urb(struct usbh_urb *urb)
}
/* dma addr must be aligned 4 bytes */
if ((((uint32_t)urb->setup) & 0x03) || (((uint32_t)urb->transfer_buffer) & 0x03)) {
return -USB_ERR_INVAL;
}
USB_ASSERT_MSG(!((uintptr_t)urb->setup % 4) && !((uintptr_t)urb->transfer_buffer % 4),
"urb->setup or urb->transfer_buffer is not aligned 4 bytes");
#ifdef CONFIG_USB_DCACHE_ENABLE
if (((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) || ((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE)) {
USB_LOG_ERR("urb buffer is not align with %d\r\n", CONFIG_USB_ALIGN_SIZE);
while (1) {
}
}
USB_ASSERT_MSG(!((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) &&
!((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE),
"urb->setup or urb->transfer_buffer is not aligned %d", CONFIG_USB_ALIGN_SIZE);
#endif
bus = urb->hport->bus;
@ -926,7 +915,7 @@ static void dwc2_inchan_irq_handler(struct usbh_bus *bus, uint8_t ch_num)
if (chan_intstatus & USB_OTG_HCINT_XFRC) {
urb->errorcode = 0;
uint32_t count = chan->xferlen - (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* how many size has received */
uint32_t count = chan->xferlen - (USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); /* how many size has received */
//uint32_t has_used_packets = chan->num_packets - ((USB_OTG_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19); /* how many packets have used */
urb->actual_length += count;

View File

@ -335,11 +335,7 @@ static struct ehci_qh_hw *ehci_control_urb_init(struct usbh_bus *bus, struct usb
qtd_data = ehci_qtd_alloc(bus);
qtd_status = ehci_qtd_alloc(bus);
if (!qtd_setup || !qtd_data || !qtd_status) {
USB_LOG_ERR("qtd alloc failed\r\n");
while (1) {
}
}
USB_ASSERT_MSG(qtd_setup && qtd_data && qtd_status, "ctrl qtd alloc failed");
ehci_qh_fill(qh,
urb->hport->dev_addr,
@ -424,7 +420,6 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u
struct ehci_qtd_hw *qtd = NULL;
struct ehci_qtd_hw *first_qtd = NULL;
struct ehci_qtd_hw *prev_qtd = NULL;
uint32_t qtd_num = 0;
uint32_t xfer_len = 0;
uint32_t token;
size_t flags;
@ -447,11 +442,7 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u
while (1) {
qtd = ehci_qtd_alloc(bus);
if (qtd == NULL) {
USB_LOG_ERR("qtd alloc failed\r\n");
while (1) {
}
}
USB_ASSERT_MSG(qtd, "bulk qtd alloc failed");
if (buflen > 0x4000) {
xfer_len = 0x4000;
@ -490,11 +481,6 @@ static struct ehci_qh_hw *ehci_bulk_urb_init(struct usbh_bus *bus, struct usbh_u
if (buflen == 0) {
break;
}
qtd_num++;
if (qtd_num == CONFIG_USB_EHCI_QTD_NUM) {
return NULL;
}
}
/* update qh first qtd */
@ -530,7 +516,6 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u
struct ehci_qtd_hw *qtd = NULL;
struct ehci_qtd_hw *first_qtd = NULL;
struct ehci_qtd_hw *prev_qtd = NULL;
uint32_t qtd_num = 0;
uint32_t xfer_len = 0;
uint32_t token;
size_t flags;
@ -553,11 +538,7 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u
while (1) {
qtd = ehci_qtd_alloc(bus);
if (qtd == NULL) {
USB_LOG_ERR("qtd alloc failed\r\n");
while (1) {
}
}
USB_ASSERT_MSG(qtd, "intr qtd alloc failed");
if (buflen > 0x4000) {
xfer_len = 0x4000;
@ -596,11 +577,6 @@ static struct ehci_qh_hw *ehci_intr_urb_init(struct usbh_bus *bus, struct usbh_u
if (buflen == 0) {
break;
}
qtd_num++;
if (qtd_num == CONFIG_USB_EHCI_QTD_NUM) {
return NULL;
}
}
/* update qh first qtd */
@ -1220,11 +1196,9 @@ int usbh_submit_urb(struct usbh_urb *urb)
}
#ifdef CONFIG_USB_DCACHE_ENABLE
if (((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) || ((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE)) {
USB_LOG_ERR("urb buffer is not align with %d\r\n", CONFIG_USB_ALIGN_SIZE);
while (1) {
}
}
USB_ASSERT_MSG(!((uintptr_t)urb->setup % CONFIG_USB_ALIGN_SIZE) &&
!((uintptr_t)urb->transfer_buffer % CONFIG_USB_ALIGN_SIZE),
"urb->setup or urb->transfer_buffer is not aligned %d", CONFIG_USB_ALIGN_SIZE);
#endif
bus = urb->hport->bus;

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@ -266,11 +266,7 @@ int usb_dc_init(uint8_t busid)
offset = usbd_musb_fifo_config(&cfg[i], offset);
}
if (offset > usb_get_musb_ram_size()) {
USB_LOG_ERR("offset:%d is overflow, please check your table\r\n", offset);
while (1) {
}
}
USB_ASSERT_MSG(offset <= usb_get_musb_ram_size(), "Your fifo config is overflow, please check");
/* Enable USB interrupts */
HWREGB(USB_BASE + MUSB_IE_OFFSET) = USB_IE_RESET | USB_IE_SUSPND | USB_IE_RESUME;

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@ -504,11 +504,7 @@ int usb_hc_init(struct usbh_bus *bus)
offset = usbh_musb_fifo_config(bus, &cfg[i], offset);
}
if (offset > usb_get_musb_ram_size()) {
USB_LOG_ERR("offset:%d is overflow, please check your table\r\n", offset);
while (1) {
}
}
USB_ASSERT_MSG(offset <= usb_get_musb_ram_size(), "Your fifo config is overflow, please check");
/* Enable USB interrupts */
regval = USB_IE_RESET | USB_IE_CONN | USB_IE_DISCON |