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https://git.rtems.org/rtems-libbsd/
synced 2025-10-14 13:56:17 +08:00
Add Xilinx Zynq BSP support
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@@ -56,4 +56,36 @@ RTEMS_BSD_DEFINE_NEXUS_DEVICE(smc, 0, RTEMS_ARRAY_SIZE(smc0_res),
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RTEMS_BSD_DEFINE_NEXUS_DEVICE(fec, 0, 0, NULL);
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#elif defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H)
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#include <bsp/irq.h>
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static const rtems_bsd_device_resource zy7_slcr0_res[] = {
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{
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.type = RTEMS_BSD_RES_MEMORY,
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.start_request = 0,
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.start_actual = 0xf8000000
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}
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};
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RTEMS_BSD_DEFINE_NEXUS_DEVICE(zy7_slcr, 0, RTEMS_ARRAY_SIZE(zy7_slcr0_res),
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&zy7_slcr0_res[0]);
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static const rtems_bsd_device_resource cgem0_res[] = {
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{
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.type = RTEMS_BSD_RES_MEMORY,
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.start_request = 0,
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.start_actual = 0xe000b000
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}, {
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.type = RTEMS_BSD_RES_IRQ,
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.start_request = 0,
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.start_actual = ZYNQ_IRQ_ETHERNET_0
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}
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};
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RTEMS_BSD_DEFINE_NEXUS_DEVICE(cgem, 0, RTEMS_ARRAY_SIZE(cgem0_res),
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&cgem0_res[0]);
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SYSINIT_DRIVER_REFERENCE(e1000phy, miibus);
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#endif
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@@ -27,6 +27,9 @@
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#if defined(LIBBSP_ARM_LPC24XX_BSP_H)
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/* No cache */
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#elif defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H)
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/* With cache, no coherency support in hardware */
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#define CPU_DATA_CACHE_ALIGNMENT 32
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#elif defined(LIBBSP_ARM_LPC32XX_BSP_H)
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/* With cache, no coherency support in hardware */
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#include <libcpu/cache.h>
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@@ -36,6 +36,8 @@
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#if defined(LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H)
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#define NET_CFG_INTERFACE_0 "smc0"
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#elif defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H)
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#define NET_CFG_INTERFACE_0 "cgem0"
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#elif defined(__GENMCF548X_BSP_H)
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#define NET_CFG_INTERFACE_0 "fec0"
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#else
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