Add a System Level Control Register driver for the Xilinx Zynq
Ultrascale+ MPSoC with basic clock control functionality for use with
the Cadence GEM. This also removes the Zynq-7000 clock control weakref
from compilation depending on the BSP in use.
- Do not build a test if a dependency is not enabled.
- Perform a dependency check and generate an error if an enabled module
depends on a disabled module.
Closes#4077
- Provide support for separate user and kernel include paths in
libbsd.py.
- Update all added files with a suitable context to build them
with. Supported contexts are `kernel` and `user`.
- Kernel source use the kernel, CPU, and build header paths in
this order.
- User source use the user, kernel, CPU and build header paths
in this order. The FreeBSD /usr/include tree has some kernel
header files installed as well as user land header files. This
complicates the separation as some kernel header files are not
visible to user land code while other are. This is handled by
appending the kernel header paths to the user header paths so
user land code will include a user header with the same name as
a kernel header over the kernel header but will find a kernel
header if there is no matching user header file.
Closes#4067
There is a bug in the #ifdef regarding FDT so this file hasn't been
compiled. If that bug is solved, the driver doesn't work for some other
reason.
With the FDT-bug the driver hasn't been used by anyone. So just remove
it again.
- Update FreeBSD files in libbsd.py to required by i386 based BSPs
- Some machine specific header files have moved to different directories
in FreeBSD
- Add missing files e1000 network driver (iflib*)
- path-mappings allow to fix autogenerated include paths for some corner
cases of target platforms without the need to change the build system
- Currently used for i386 based bsps