3818 Commits

Author SHA1 Message Date
Andrew Waterman
8df626bf1d Merge pull request #2099 from riscv-software-src/vector-tests
test: add basic random tests for V extension
2025-10-05 16:51:50 -07:00
Alexander Romanov
dac31c1799 test: add basic random tests for V extension 2025-10-05 14:35:50 +03:00
Andrew Waterman
4d6c71e327 Merge pull request #2095 from arrv-sc/arrv-sc/snippy-tests
ci: add testing with llvm-snippy
2025-10-02 13:51:10 -07:00
Alexander Romanov
c44fd213bd ci: add testing with llvm-snippy
This commits adds basic spike testing using llvm-snippy random code
generator. This initial testing runs spike on random valid code snippets and
checks that it doesn't fail.

Co-authored-by: Ksenia Dobrovolskaya <ksenia.dobrovolskaya@syntacore.com>
2025-10-02 13:10:49 +03:00
Andrew Waterman
fe57ec514d Merge pull request #2096 from riscv-software-src/remove-ci-tarball
Remove CI tarball; build tests in CI
2025-10-02 02:20:08 -07:00
Andrew Waterman
e360efb8d1 Build tests in CI rather than downloading a tarball from github 2025-10-02 01:50:09 -07:00
Andrew Waterman
38eec3f323 Merge pull request #2097 from riscv-software-src/fix-werror
Actually use -Werror in CI again
2025-10-01 23:41:39 -07:00
Andrew Waterman
e2eb763332 Add ci-tests/.gitignore 2025-10-01 17:04:40 -07:00
Andrew Waterman
4a429d146d Install cross compiler package 2025-10-01 17:04:32 -07:00
Andrew Waterman
ffcc3e69a7 Actually use -Werror in CI again 2025-10-01 16:20:20 -07:00
Andrew Waterman
e69c5376a5 Suppress warning for unused write() result 2025-10-01 16:20:20 -07:00
Andrew Waterman
9ea67d0ca8 Add UNUSED to suppress warning 2025-10-01 16:11:49 -07:00
Andrew Waterman
eb90f5aa75 Add default destructor to suppress warning 2025-10-01 16:11:49 -07:00
Andrew Waterman
837fcf7c15 Avoid VLAs 2025-10-01 16:11:49 -07:00
Andrew Waterman
9145cdcae2 Merge pull request #2094 from chihminchao/enhance-amo-disasm
disasm: show the acquire and release attribute to amo instructions
2025-10-01 15:32:33 -07:00
Andrew Waterman
bccbf3b3de Merge pull request #2093 from chihminchao/ext-zibi
new extension : zibi
2025-10-01 15:06:45 -07:00
Andrew Waterman
aee4555eea Merge pull request #2092 from riscv-software-src/zvfqbdot8f
Implement Zvfqbdot8f and Zvfqldot8f
2025-10-01 00:32:58 -07:00
Chih-Min Chao
7b060d0d86 disasm: show the acquire and release attribute to amo instructions
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2025-09-30 22:59:56 -07:00
Chih-Min Chao
e2e02098a4 ext: add zibi
It implement v0.6 version

reference
    https://github.com/riscv/zibi/releases/download/v0.6/zibi.pdf
    https://riscv.atlassian.net/wiki/spaces/USXX/pages/599261201/Branch+with+Immediate+Zibi+Ratification+Plan

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2025-09-30 22:57:32 -07:00
Chih-Min Chao
4c6be8305c update encoding.h
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2025-09-30 22:45:10 -07:00
Andrew Waterman
3232ce1b76 Implement Zvflqdot8f 2025-09-30 19:13:53 -07:00
Andrew Waterman
e3dc14a878 Implement Zvfbqdot8f 2025-09-30 19:13:10 -07:00
Andrew Waterman
a07e44071f Use bulk normalization algorithm for Zvfqbdot8f 2025-09-30 19:09:41 -07:00
Andrew Waterman
3b066d68fe Merge pull request #2089 from chihminchao/fix-mseccfg-rv32
csr: fix mseccfg for rv32
2025-09-30 14:31:03 -07:00
Andrew Waterman
b3b7ed4c36 Merge pull request #2091 from aap-sc/aap-sc/leakage_fix
Get rid of leaking pointers in examples for custom extension
2025-09-30 14:19:03 -07:00
Parshintsev Anatoly
a191144b7a Get rid of leaking pointers in examples for custom extention
Building of spike-based simulator with memory sanitizer reports leaking
pointers if custom extension are used. This is because existing
facilities do not have a proper destructor procedure, so the objects
representing custom extentions are leaked. This commit implements
quick-and-dirty fix for the problem.
2025-09-30 22:06:25 +03:00
Chih-Min Chao
180c10fe42 csr: fix mseccfg for rv32
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2025-09-30 00:45:24 -07:00
Andrew Waterman
bfe100fbd3 Merge pull request #2088 from ved-rivos/issue_2078
PTE store in s2xlate should use the trap_type instead of type
2025-09-25 17:55:51 -07:00
Ved Shanbhogue
cfd4930cb6 PTE store in s2xlate should use the trap_type instead of type 2025-09-25 19:13:14 -05:00
Andrew Waterman
f51df5d395 Merge pull request #2077 from riscv-software-src/fix-2076
Prevent div-by-0 when executing Zvbdot instructions with VLEN=0
2025-09-09 04:38:05 -07:00
Andrew Waterman
18bcac3d94 Prevent div-by-0 when executing Zvbdot instructions with VLEN=0
Fixes #2076
2025-09-09 03:45:14 -07:00
Andrew Waterman
545712a6f7 Merge pull request #2074 from riscv-software-src/fix-2073
Allow DEBUG_START to be nonzero again
2025-09-08 16:35:36 -07:00
Andrew Waterman
e80b890ebf Suppress -Wtype-limits warning 2025-09-08 16:14:16 -07:00
Andrew Waterman
3d85f9af29 Merge pull request #2072 from ved-rivos/issue_2063
Clear SDT in the temporary state variable
2025-09-08 16:13:03 -07:00
Ved Shanbhogue
743732c3e6 Clear SDT in the temporary state variable 2025-09-07 16:51:44 -05:00
Andrew Waterman
d3be9a4d9d Merge pull request #2069 from riscv-software-src/fix-zve
Relax VLEN/ELEN checking
2025-09-05 13:24:32 -07:00
Andrew Waterman
1d56b556b5 Relax VLEN/ELEN checking
We should allow ISA strings like rv64gc_zve32f.  Per the spec, the
various Zve extensions imply a minimum VLEN, so rv64gc_zve32f
is unambiguously equivalent to rv64gc_zve32f_zvl32b. Similarly,
rv64gc_zve64x, rv64gc_zve64x_zvl64b, and rv64gc_zve64x_zvl32b are
all unambiguously equivalent.
2025-09-04 14:47:37 -07:00
Andrew Waterman
faeae4eada VLEN is unitless 2025-09-04 14:42:11 -07:00
Andrew Waterman
acac77d59d No tabs 2025-09-04 14:36:06 -07:00
Andrew Waterman
c3ec317126 Merge pull request #2066 from riscv-software-src/quiet-ci
Quiet the CI logs
2025-09-04 01:31:04 -07:00
Andrew Waterman
7e389e824f Quiet the CI logs
Send instruction traces to /dev/null to make the CI logs readable.
2025-09-04 01:01:21 -07:00
Andrew Waterman
19409bdfac Merge pull request #2065 from riscv-software-src/ldot
Add Zvldot extension support
2025-09-04 00:54:44 -07:00
Andrew Waterman
dcef3e5881 Merge pull request #2054 from nadime15/update_vlen_elen
Add VLEN >= ELEN validation check
2025-09-03 19:49:49 -07:00
Andrew Waterman
717a6e275c Add Zvldot extension support 2025-09-03 19:49:23 -07:00
Andrew Waterman
cfc472e83b Use f32_add_bulknorm_odd for vfwbdot 2025-09-03 18:48:08 -07:00
Andrew Waterman
cf7d57ef74 Add f32_add_bulknorm_odd routine
Used by Zvldot/Zvbdot
2025-09-03 18:33:37 -07:00
Andrew Waterman
9c190a07c6 Merge pull request #2058 from nadime15/fix-zvfbf-dependency-check
Fix BFloat16 vector extension dependencies and requirements
2025-08-28 16:37:08 -07:00
Nadime Barhoumi
dcb5f0c784 Remove redundant checks in Zfbfmin and Zvfbfmin validation 2025-08-28 10:22:02 -04:00
Nadime Barhoumi
715c1597ab Fix BFloat16 vector extension dependencies
* Enable EXT_INTERNAL_ZFH_MOVE when either Zfbfmin or Zfhmin is enabled
* Change Zvfbfmin to require Zve32f instead of V extension.
* Add proper dependency chain for Zvfbfwma requiring both Zvfbfmin and Zfbfmin.
2025-08-28 10:22:02 -04:00
Andrew Waterman
9a46080b52 Merge pull request #2062 from binno/revert_vstopi_change
Revert "Don't shift enabled bits of interrupt in vstopi csrs"
2025-08-28 00:51:38 -07:00