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Author SHA1 Message Date
Giovanni Mascellani
b5b5c67b34 vkd3d-shader/ir: Lower ABSNEG modifiers to instructions. 2025-10-13 19:25:51 +02:00
Giovanni Mascellani
968eb7467c vkd3d-shader/ir: Use VSIR_OP_NEG in insert_fragment_fog_before_ret(), in the common part. 
The NEG source modifier is not generated any more during vsir
transformation, so it can be dropped in backends.
 2025-10-13 19:13:05 +02:00
Giovanni Mascellani
ca23db5bae vkd3d-shader/ir: Use VSIR_OP_NEG in insert_fragment_fog_before_ret(), in the doubly exponential case. 2025-10-13 19:13:01 +02:00
Giovanni Mascellani
b2d47693b4 vkd3d-shader/ir: Use VSIR_OP_NEG in insert_fragment_fog_before_ret(), in the exponential case. 2025-10-13 19:12:56 +02:00
Giovanni Mascellani
786ffe69f7 vkd3d-shader/ir: Use VSIR_OP_NEG in insert_fragment_fog_before_ret(), in the linear case. 2025-10-13 19:12:51 +02:00
Giovanni Mascellani
eb1210f517 vkd3d-shader/ir: Lower NEG modifiers to instructions. 2025-10-13 19:07:01 +02:00
Giovanni Mascellani
79736ae6ff vkd3d-shader/ir: Introduce VSIR_OP_NEG to represent floating-point negation. 2025-10-13 19:06:34 +02:00
Henri Verbeet
62fa65066f tests/shader_runner: Use format names if available in trace_format_cap(). 2025-10-13 19:04:19 +02:00
Henri Verbeet
9de229925d vkd3d-shader/ir: Handle integer division by zero in vsir_program_lower_udiv(). 
This achieves two things:
  - The GLSL backend no longer needs to handle this by itself. Likwise, the
    MSL backend won't have to either.
  - We no longer handle division by zero for DXIL UDiv and URem instructions,
    which leave this undefined.
 2025-10-13 19:00:05 +02:00
Henri Verbeet
433adab6ad vkd3d-shader/glsl: Handle integer operands in shader_glsl_movc(). 
We don't use these yet, but we're about to.
 2025-10-13 19:00:05 +02:00
Henri Verbeet
7aa6f4f8b6 tests: Replace the test_shader_instructions() "ps_udiv" test with a shader runner test. 2025-10-13 19:00:05 +02:00
Henri Verbeet
90cbe25d1e vkd3d-shader/spirv: Do not handle division by zero for VSIR_OP_IDIV or VSIR_OP_IREM. 
These correspond to the DXIL SDiv and SRem instructions, for which division by
zero is undefined. Division by zero is also undefined for DXIL UDiv and URem;
addressing those is slightly more involved.
 2025-10-13 19:00:05 +02:00
Elizabeth Figura
dd55b15865 vkd3d-shader/ir: Implement an initial vsir copy propagation pass. 2025-10-13 18:55:42 +02:00
Elizabeth Figura
cfe51e84df vkd3d-shader/glsl: Wrap gl_GlobalInvocationID in an uvec4. 
Callers to shader_glsl_print_register_name() expect this. In particular, this
fixes translation of instructions such as

    store_uav_typed u0.xyzw, vThreadID.xyxx, l(2.00000000e+00)

which is currently translated as the invalid

    imageStore(cs_image_0, ivec4(gl_GlobalInvocationID).xy, vec4(uintBitsToFloat(0x40000000u), 0, 0, 0));
 2025-10-13 18:51:24 +02:00
Elizabeth Figura
0bb8272f26 vkd3d-shader: Introduce an interface to specify sm1 shadow samplers. 2025-10-13 18:40:52 +02:00
Elizabeth Figura
539a5be370 vkd3d-shader: Introduce an interface to specify 1.x texture dimensions. 2025-10-13 18:40:44 +02:00
Elizabeth Figura
937b80f3f2 vkd3d-shader: Remove the no longer used flat_constant_count field from struct vsir_program. 2025-10-13 18:40:25 +02:00
Elizabeth Figura
2be9c880ff vkd3d-shader: Remove sm1-specific descriptor scanning logic. 2025-10-13 18:25:05 +02:00
Elizabeth Figura
db41ba557b vkd3d-shader/hlsl: Create vsir descriptor info in hlsl_parse(). 2025-10-13 18:25:05 +02:00
Elizabeth Figura
8d8132b2c7 vkd3d-shader/d3dbc: Create vsir descriptor information in the parser. 2025-10-13 18:14:41 +02:00
Giovanni Mascellani
781bb10ed0 vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_dcl_primitive_topology(). 2025-10-09 15:52:10 +02:00
Giovanni Mascellani
6a9147b66b vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_dcl_count(). 2025-10-09 15:52:03 +02:00
Giovanni Mascellani
0a9fd13b25 vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in struct sm6_cmp_info. 2025-10-09 15:51:55 +02:00
Giovanni Mascellani
0a3d2f877d vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_dx_dot(). 2025-10-09 15:51:48 +02:00
Giovanni Mascellani
00993b7fa9 vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_dcl_register_builtin(). 2025-10-09 15:51:40 +02:00
Giovanni Mascellani
ebb320346a vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_dx_atomic_binop(). 2025-10-09 15:51:33 +02:00
Giovanni Mascellani
9779b62699 vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in instruction_init_with_resource(). 2025-10-09 15:51:25 +02:00
Giovanni Mascellani
39a9f0921c vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_binop(). 2025-10-09 15:51:18 +02:00
Henri Verbeet
32a6967778 vkd3d-shader/dxil: Ignore ORDERING_SEQCST. 
More recent versions of the Vulkan/SPIR-V validation layers have started
to complain about our usage of "SequentiallyConsistent" in our SPIR-V
output. Specifically, VUID-StandaloneSpirv-MemorySemantics-10866 "Memory
Semantics with SequentiallyConsistent memory order must not be used in
the Vulkan API".

The SPIR-V specification says: "If the declared memory model is Vulkan,
SequentiallyConsistent must not be used." However, we're using the
GLSL450 memory model with SPIR-V 1.3, and "Vulkan" is not available
before SPIR-V 1.5.

The Vulkan specification says "Sequentially consistent atomics and
barriers are not supported and SequentiallyConsistent is treated as
AcquireRelease. SequentiallyConsistent should not be used." in the
"Shader Memory Access Ordering" section.

Those don't quite add up to the "... must not be used in the Vulkan
API", from the validation layers, but it does seem clear that
SequentiallyConsistent isn't actually supported. On the DXIL side, when
targetting SPIR-V with dxc, the generated SPIR-V uses the
"None"/"Relaxed" memory semantics. I wasn't immediately able to find a
reference for what seq_cst is supposed to mean in the context of DXIL,
but "None"/"Relaxed" does seem consistent with how the HLSL
atomic/interlocked intrinsics are expected to behave, as well as with
our behaviour for tpf shaders.
 2025-10-09 15:39:41 +02:00
Elizabeth Figura
0bfed6587a vkd3d-shader/hlsl: Use replace_ir() for fold_redundant_casts(). 2025-10-09 13:21:47 +02:00
Elizabeth Figura
adc8d5cfad vkd3d-shader/hlsl: Use replace_ir() for fold_trivial_swizzles(). 2025-10-09 13:21:47 +02:00
Elizabeth Figura
2a4ac90ad2 vkd3d-shader/hlsl: Use replace_ir() for fold_swizzle_chains(). 2025-10-09 13:21:47 +02:00
Elizabeth Figura
f3522eae2e vkd3d-shader/hlsl: Rename lower_ir() to replace_ir(). 
We want to use it for folding passes as well, but describing these as "lowering"
is not very accurate. Use the more generic term "replace".
 2025-10-09 13:21:47 +02:00
Elizabeth Figura
be31842197 vkd3d-shader/hlsl: Return a node from lower_ir(). 
This allows us to use the same function for "folding" passes, which usually
replace with a node other than the last one added in a block.
 2025-10-09 13:20:46 +02:00
Francisco Casas
b1672fd3fe vkd3d-shader/ir: Don't preallocate instructions in vsir_cfg_structure_list_emit_loop(). 2025-10-08 13:43:52 +02:00
Francisco Casas
aa8c935030 vkd3d-shader/ir: Don't preallocate instructions in vsir_cfg_structure_list_emit_block(). 2025-10-08 13:43:52 +02:00
Francisco Casas
26d1f4c78d vkd3d-shader/ir: Don't preallocate in vsir_program_materialise_phi_ssas_to_temps(). 2025-10-08 13:43:52 +02:00
Francisco Casas
9af4ec2b28 vkd3d-shader/ir: Don't preallocate instructions in vsir_cfg_structure_list_emit_jump(). 2025-10-08 13:43:52 +02:00
Francisco Casas
0c3828e8c9 vkd3d-shader/ir: Don't preallocate instructions in vsir_program_lower_switch_to_selection_ladder(). 2025-10-08 13:43:52 +02:00
Francisco Casas
aefa22a063 vkd3d-shader/ir: Don't preallocate instructions in cf_flattener_iterate_instruction_array(). 2025-10-08 13:43:52 +02:00
Henri Verbeet
7dea1e83d2 vkd3d-shader: Get rid of component_type_is_64_bit(). 
Its last user was removed in commit
9623ca4a6f.
 2025-10-08 13:41:18 +02:00
Henri Verbeet
d50503f116 vkd3d-shader/spirv: Pass a vsir_data_type to spirv_compiler_emit_interpolation_decorations(). 2025-10-08 13:32:42 +02:00
Henri Verbeet
8bf97a27bf vkd3d-shader/spirv: Pass a vsir_data_type to spirv_compiler_emit_store_dst_swizzled(). 2025-10-08 13:32:42 +02:00
Henri Verbeet
408eb145a6 vkd3d-shader/spirv: Pass a vsir_data_type to spirv_compiler_emit_load_src_with_type(). 2025-10-08 13:32:42 +02:00
Giovanni Mascellani
c0db7f7ff5 vkd3d-shader/dxil: Generate ABS instructions instead of using modifiers. 2025-10-08 13:30:17 +02:00
Giovanni Mascellani
112bbbb161 vkd3d-shader/ir: Lower ABS modifiers to instructions. 2025-10-08 13:30:17 +02:00
Henri Verbeet
c522db8ce8 tests/shader_runner: Handle the "rgba" probe format as an alias for "f32". 2025-10-07 13:12:36 +02:00
Henri Verbeet
6b7e4453d5 vkd3d-shader/spirv: Use spirv_get_type_id() in spirv_compiler_emit_atomic_instruction(). 2025-10-07 13:11:22 +02:00
Henri Verbeet
cd5e1b0e20 vkd3d-shader/spirv: Use spirv_get_type_id() in spirv_compiler_emit_store_uav_raw_structured(). 2025-10-07 13:11:22 +02:00
Henri Verbeet
7ffcbaaf66 vkd3d-shader/spirv: Use spirv_get_type_id() in spirv_compiler_emit_ld_raw_structured_srv_uav(). 2025-10-07 13:11:22 +02:00